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Fintek and Intel i3100 Super I/O cleanups.
[coreboot.git]
/
src
/
superio
/
intel
/
i3100
/
i3100_early_serial.c
diff --git
a/src/superio/intel/i3100/i3100_early_serial.c
b/src/superio/intel/i3100/i3100_early_serial.c
index a52b852786ec6d585fb3cee7f7e22a4683dab542..74c20c537caa836de45341d44c75e72c69c0b987 100644
(file)
--- a/
src/superio/intel/i3100/i3100_early_serial.c
+++ b/
src/superio/intel/i3100/i3100_early_serial.c
@@
-21,8
+21,7
@@
#include <arch/romcc_io.h>
#include "i3100.h"
#include <arch/romcc_io.h>
#include "i3100.h"
-static void i3100_sio_write(u8 port, u8 ldn, u8 index,
- u8 value)
+static void i3100_sio_write(u8 port, u8 ldn, u8 index, u8 value)
{
outb(0x07, port);
outb(ldn, port + 1);
{
outb(0x07, port);
outb(ldn, port + 1);
@@
-32,21
+31,21
@@
static void i3100_sio_write(u8 port, u8 ldn, u8 index,
static void i3100_enable_serial(u8 port, u8 ldn, u16 iobase)
{
static void i3100_enable_serial(u8 port, u8 ldn, u16 iobase)
{
- /* Enter configuration state */
+ /* Enter configuration state
.
*/
outb(0x80, port);
outb(0x86, port);
outb(0x80, port);
outb(0x86, port);
- /* Enable serial port */
+ /* Enable serial port
.
*/
i3100_sio_write(port, ldn, 0x30, 0x01);
i3100_sio_write(port, ldn, 0x30, 0x01);
- /* Set serial port I
O region
*/
+ /* Set serial port I
/O region.
*/
i3100_sio_write(port, ldn, 0x60, (iobase >> 8) & 0xff);
i3100_sio_write(port, ldn, 0x61, iobase & 0xff);
i3100_sio_write(port, ldn, 0x60, (iobase >> 8) & 0xff);
i3100_sio_write(port, ldn, 0x61, iobase & 0xff);
- /* Enable device interrupts, set UART_CLK predivide to 26 */
+ /* Enable device interrupts, set UART_CLK predivide to 26
.
*/
i3100_sio_write(port, 0x00, 0x29, 0x0b);
i3100_sio_write(port, 0x00, 0x29, 0x0b);
- /* Exit configuration state */
+ /* Exit configuration state
.
*/
outb(0x68, port);
outb(0x08, port);
}
outb(0x68, port);
outb(0x08, port);
}