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vgabios: Define video_save_pointer_table layout.
[seabios.git]
/
src
/
smp.c
diff --git
a/src/smp.c
b/src/smp.c
index 00cf64bd9dab840489527488c7c562525097875c..8c077a1bab49e2a80b810ab1eb673a5291df5e23 100644
(file)
--- a/
src/smp.c
+++ b/
src/smp.c
@@
-8,7
+8,6
@@
#include "util.h" // dprintf
#include "config.h" // CONFIG_*
#include "cmos.h" // CMOS_BIOS_SMP_COUNT
#include "util.h" // dprintf
#include "config.h" // CONFIG_*
#include "cmos.h" // CMOS_BIOS_SMP_COUNT
-#include "farptr.h" // ASSERT32
#include "paravirt.h"
#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
#include "paravirt.h"
#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
@@
-18,15
+17,17
@@
#define APIC_ENABLED 0x0100
#define APIC_ENABLED 0x0100
-struct { u32 ecx, eax, edx; } smp_mtrr[
16
] VAR16VISIBLE;
+struct { u32 ecx, eax, edx; } smp_mtrr[
32
] VAR16VISIBLE;
u32 smp_mtrr_count VAR16VISIBLE;
void
wrmsr_smp(u32 index, u64 val)
{
wrmsr(index, val);
u32 smp_mtrr_count VAR16VISIBLE;
void
wrmsr_smp(u32 index, u64 val)
{
wrmsr(index, val);
- if (smp_mtrr_count >= ARRAY_SIZE(smp_mtrr))
+ if (smp_mtrr_count >= ARRAY_SIZE(smp_mtrr)) {
+ warn_noalloc();
return;
return;
+ }
smp_mtrr[smp_mtrr_count].ecx = index;
smp_mtrr[smp_mtrr_count].eax = val;
smp_mtrr[smp_mtrr_count].edx = val >> 32;
smp_mtrr[smp_mtrr_count].ecx = index;
smp_mtrr[smp_mtrr_count].eax = val;
smp_mtrr[smp_mtrr_count].edx = val >> 32;
@@
-35,7
+36,7
@@
wrmsr_smp(u32 index, u64 val)
u32 CountCPUs VAR16VISIBLE;
u32 MaxCountCPUs VAR16VISIBLE;
u32 CountCPUs VAR16VISIBLE;
u32 MaxCountCPUs VAR16VISIBLE;
-extern void smp_ap_boot_code();
+extern void smp_ap_boot_code(
void
);
ASM16(
" .global smp_ap_boot_code\n"
"smp_ap_boot_code:\n"
ASM16(
" .global smp_ap_boot_code\n"
"smp_ap_boot_code:\n"
@@
-70,10
+71,10
@@
ASM16(
void
smp_probe(void)
{
void
smp_probe(void)
{
- ASSERT32();
+ ASSERT32
FLAT
();
u32 eax, ebx, ecx, cpuid_features;
cpuid(1, &eax, &ebx, &ecx, &cpuid_features);
u32 eax, ebx, ecx, cpuid_features;
cpuid(1, &eax, &ebx, &ecx, &cpuid_features);
- if (
!
(cpuid_features & CPUID_APIC)) {
+ if (
eax < 1 || !
(cpuid_features & CPUID_APIC)) {
// No apic - only the main cpu is present.
dprintf(1, "No apic - only the main cpu is present.\n");
CountCPUs= 1;
// No apic - only the main cpu is present.
dprintf(1, "No apic - only the main cpu is present.\n");
CountCPUs= 1;
@@
-104,6
+105,7
@@
smp_probe(void)
}
// broadcast SIPI
}
// broadcast SIPI
+ barrier();
writel(APIC_ICR_LOW, 0x000C4500);
u32 sipi_vector = BUILD_AP_BOOT_ADDR >> 12;
writel(APIC_ICR_LOW, 0x000C4600 | sipi_vector);
writel(APIC_ICR_LOW, 0x000C4500);
u32 sipi_vector = BUILD_AP_BOOT_ADDR >> 12;
writel(APIC_ICR_LOW, 0x000C4600 | sipi_vector);
@@
-114,7
+116,7
@@
smp_probe(void)
} else {
u8 cmos_smp_count = inb_cmos(CMOS_BIOS_SMP_COUNT);
while (cmos_smp_count + 1 != readl(&CountCPUs))
} else {
u8 cmos_smp_count = inb_cmos(CMOS_BIOS_SMP_COUNT);
while (cmos_smp_count + 1 != readl(&CountCPUs))
-
;
+
yield()
;
}
// Restore memory.
}
// Restore memory.
@@
-127,11
+129,3
@@
smp_probe(void)
dprintf(1, "Found %d cpu(s) max supported %d cpu(s)\n", readl(&CountCPUs),
MaxCountCPUs);
}
dprintf(1, "Found %d cpu(s) max supported %d cpu(s)\n", readl(&CountCPUs),
MaxCountCPUs);
}
-
-// Reset variables to zero
-void
-smp_probe_setup(void)
-{
- CountCPUs = 0;
- smp_mtrr_count = 0;
-}