+ pci_config_writeb(bdf, pam0, 0x10);
+}
+
+static void i440fx_bios_make_readonly(struct pci_device *pci, void *arg)
+{
+ make_bios_readonly_intel(pci->bdf, I440FX_PAM0);
+}
+
+static const struct pci_device_id dram_controller_make_readonly_tbl[] = {
+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
+ i440fx_bios_make_readonly),
+ PCI_DEVICE_END
+};
+
+// Make the 0xc0000-0x100000 area read/writable.
+void
+make_bios_writable(void)
+{
+ if (CONFIG_COREBOOT || usingXen())
+ return;
+
+ dprintf(3, "enabling shadow ram\n");
+
+ // At this point, statically allocated variables can't be written,
+ // so do this search manually.
+ int bdf;
+ foreachbdf(bdf, 0) {
+ u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID);
+ u16 vendor = vendev & 0xffff, device = vendev >> 16;
+ if (vendor == PCI_VENDOR_ID_INTEL
+ && device == PCI_DEVICE_ID_INTEL_82441) {
+ make_bios_writable_intel(bdf, I440FX_PAM0);
+ return;
+ }
+ }
+ dprintf(1, "Unable to unlock ram - bridge not found\n");
+}
+
+// Make the BIOS code segment area (0xf0000) read-only.
+void
+make_bios_readonly(void)
+{
+ if (CONFIG_COREBOOT || usingXen())
+ return;
+
+ dprintf(3, "locking shadow ram\n");
+ struct pci_device *pci = pci_find_init_device(
+ dram_controller_make_readonly_tbl, NULL);
+ if (!pci)
+ dprintf(1, "Unable to lock ram - bridge not found\n");
+}
+
+void
+qemu_prep_reset(void)
+{
+ if (CONFIG_COREBOOT)
+ return;
+ // QEMU doesn't map 0xc0000-0xfffff back to the original rom on a
+ // reset, so do that manually before invoking a hard reset.
+ make_bios_writable();
+ extern u8 code32flat_start[], code32flat_end[];
+ memcpy(code32flat_start, code32flat_start + BIOS_SRC_OFFSET
+ , code32flat_end - code32flat_start);