-#define PCI_IO_ALIGN 4096
-#define PCI_IO_SHIFT 8
-#define PCI_MEMORY_ALIGN (1UL << 20)
-#define PCI_MEMORY_SHIFT 16
-#define PCI_PREF_MEMORY_ALIGN (1UL << 20)
-#define PCI_PREF_MEMORY_SHIFT 16
-
-#if 0
-static void pci_bios_init_device_bridge(struct pci_device *pci, void *arg)
-{
- u16 bdf = pci->bdf;
- pci_bios_allocate_region(bdf, 0);
- pci_bios_allocate_region(bdf, 1);
- pci_bios_allocate_region(bdf, PCI_ROM_SLOT);
-
- u32 io_old = pci_region_addr(&pci_bios_io_region);
- u32 mem_old = pci_region_addr(&pci_bios_mem_region);
- u32 prefmem_old = pci_region_addr(&pci_bios_prefmem_region);
-
- /* IO BASE is assumed to be 16 bit */
- if (pci_region_align(&pci_bios_io_region, PCI_IO_ALIGN) == 0) {
- pci_region_disable(&pci_bios_io_region);
- }
- if (pci_region_align(&pci_bios_mem_region, PCI_MEMORY_ALIGN) == 0) {
- pci_region_disable(&pci_bios_mem_region);
- }
- if (pci_region_align(&pci_bios_prefmem_region,
- PCI_PREF_MEMORY_ALIGN) == 0) {
- pci_region_disable(&pci_bios_prefmem_region);
- }
-
- u32 io_base = pci_region_addr(&pci_bios_io_region);
- u32 mem_base = pci_region_addr(&pci_bios_mem_region);
- u32 prefmem_base = pci_region_addr(&pci_bios_prefmem_region);
-
- u8 secbus = pci_config_readb(bdf, PCI_SECONDARY_BUS);
- if (secbus > 0) {
- pci_bios_init_device_in_bus(secbus);
- }
-
- u32 io_end = pci_region_align(&pci_bios_io_region, PCI_IO_ALIGN);
- if (io_end == 0) {
- pci_region_revert(&pci_bios_io_region, io_old);
- io_base = 0xffff;
- io_end = 1;
- }
- pci_config_writeb(bdf, PCI_IO_BASE, io_base >> PCI_IO_SHIFT);
- pci_config_writew(bdf, PCI_IO_BASE_UPPER16, 0);
- pci_config_writeb(bdf, PCI_IO_LIMIT, (io_end - 1) >> PCI_IO_SHIFT);
- pci_config_writew(bdf, PCI_IO_LIMIT_UPPER16, 0);
-
- u32 mem_end = pci_region_align(&pci_bios_mem_region, PCI_MEMORY_ALIGN);
- if (mem_end == 0) {
- pci_region_revert(&pci_bios_mem_region, mem_old);
- mem_base = 0xffffffff;
- mem_end = 1;
- }
- pci_config_writew(bdf, PCI_MEMORY_BASE, mem_base >> PCI_MEMORY_SHIFT);
- pci_config_writew(bdf, PCI_MEMORY_LIMIT, (mem_end -1) >> PCI_MEMORY_SHIFT);
-
- u32 prefmem_end = pci_region_align(&pci_bios_prefmem_region,
- PCI_PREF_MEMORY_ALIGN);
- if (prefmem_end == 0) {
- pci_region_revert(&pci_bios_prefmem_region, prefmem_old);
- prefmem_base = 0xffffffff;
- prefmem_end = 1;
- }
- pci_config_writew(bdf, PCI_PREF_MEMORY_BASE,
- prefmem_base >> PCI_PREF_MEMORY_SHIFT);
- pci_config_writew(bdf, PCI_PREF_MEMORY_LIMIT,
- (prefmem_end - 1) >> PCI_PREF_MEMORY_SHIFT);
- pci_config_writel(bdf, PCI_PREF_BASE_UPPER32, 0);
- pci_config_writel(bdf, PCI_PREF_LIMIT_UPPER32, 0);
-
- dprintf(1, "PCI: br io = [0x%x, 0x%x)\n", io_base, io_end);
- dprintf(1, "PCI: br mem = [0x%x, 0x%x)\n", mem_base, mem_end);
- dprintf(1, "PCI: br pref = [0x%x, 0x%x)\n", prefmem_base, prefmem_end);
-
- u16 cmd = pci_config_readw(bdf, PCI_COMMAND);
- cmd &= ~PCI_COMMAND_IO;
- if (io_end > io_base) {
- cmd |= PCI_COMMAND_IO;
- }
- cmd &= ~PCI_COMMAND_MEMORY;
- if (mem_end > mem_base || prefmem_end > prefmem_base) {
- cmd |= PCI_COMMAND_MEMORY;
- }
- cmd |= PCI_COMMAND_MASTER;
- pci_config_writew(bdf, PCI_COMMAND, cmd);
-
- pci_config_maskw(bdf, PCI_BRIDGE_CONTROL, 0, PCI_BRIDGE_CTL_SERR);
-}
-#endif
-