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vgabios: Unify page size calculations; remove page size from vgamode_s.
[seabios.git]
/
src
/
misc.c
diff --git
a/src/misc.c
b/src/misc.c
index 0c5f608dc215bf4dfb8385a68398fddbdfb9acc7..9db49e3820c3f7bde31be04f306d649bd99ac424 100644
(file)
--- a/
src/misc.c
+++ b/
src/misc.c
@@
-1,6
+1,6
@@
// Code for misc 16bit handlers and variables.
//
// Code for misc 16bit handlers and variables.
//
-// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
+// Copyright (C) 2008
,2009
Kevin O'Connor <kevin@koconnor.net>
// Copyright (C) 2002 MandrakeSoft S.A.
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
// Copyright (C) 2002 MandrakeSoft S.A.
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
@@
-11,9
+11,11
@@
#include "pic.h" // enable_hwirq
// Amount of continuous ram under 4Gig
#include "pic.h" // enable_hwirq
// Amount of continuous ram under 4Gig
-u32 RamSize VAR16
_32
;
+u32 RamSize VAR16
VISIBLE
;
// Amount of continuous ram >4Gig
u64 RamSizeOver4G;
// Amount of continuous ram >4Gig
u64 RamSizeOver4G;
+// Space for bios tables built an run-time.
+char BiosTableSpace[CONFIG_MAX_BIOSTABLE] __aligned(MALLOC_MIN_ALIGN) VAR16VISIBLE;
/****************************************************************
/****************************************************************
@@
-51,25
+53,25
@@
handle_10(struct bregs *regs)
// dont do anything, since the VGA BIOS handles int10h requests
}
// dont do anything, since the VGA BIOS handles int10h requests
}
+// NMI handler
void VISIBLE16
void VISIBLE16
-handle_
nmi(
)
+handle_
02(void
)
{
{
- debug_isr(DEBUG_ISR_nmi);
- BX_PANIC("NMI Handler called\n");
+ debug_isr(DEBUG_ISR_02);
}
void
}
void
-mathcp_setup()
+mathcp_setup(
void
)
{
dprintf(3, "math cp init\n");
// 80x87 coprocessor installed
SETBITS_BDA(equipment_list_flags, 0x02);
{
dprintf(3, "math cp init\n");
// 80x87 coprocessor installed
SETBITS_BDA(equipment_list_flags, 0x02);
- enable_hwirq(13,
entry_75
);
+ enable_hwirq(13,
FUNC16(entry_75)
);
}
// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
void VISIBLE16
}
// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
void VISIBLE16
-handle_75()
+handle_75(
void
)
{
debug_isr(DEBUG_ISR_75);
{
debug_isr(DEBUG_ISR_75);
@@
-126,49
+128,44
@@
struct bios_config_table_s BIOS_CONFIG_TABLE VAR16FIXED(0xe6f5) = {
* GDT and IDT tables
****************************************************************/
* GDT and IDT tables
****************************************************************/
-struct descloc_s {
- u16 length;
- u32 addr;
-} PACKED;
-
// Real mode IDT descriptor
// Real mode IDT descriptor
-struct descloc_s rmode_IDT_info VAR16
_32
= {
+struct descloc_s rmode_IDT_info VAR16
VISIBLE
= {
.length = sizeof(struct rmode_IVT) - 1,
.length = sizeof(struct rmode_IVT) - 1,
- .addr = (u32)MAKE_F
AR
PTR(SEG_IVT, 0),
+ .addr = (u32)MAKE_F
LAT
PTR(SEG_IVT, 0),
};
// Dummy IDT that forces a machine shutdown if an irq happens in
// protected mode.
};
// Dummy IDT that forces a machine shutdown if an irq happens in
// protected mode.
-u8 dummy_IDT VAR16
_32
;
+u8 dummy_IDT VAR16
VISIBLE
;
// Protected mode IDT descriptor
// Protected mode IDT descriptor
-struct descloc_s pmode_IDT_info VAR16
_32
= {
+struct descloc_s pmode_IDT_info VAR16
VISIBLE
= {
.length = sizeof(dummy_IDT) - 1,
.length = sizeof(dummy_IDT) - 1,
- .addr = (u32)MAKE_F
AR
PTR(SEG_BIOS, &dummy_IDT),
+ .addr = (u32)MAKE_F
LAT
PTR(SEG_BIOS, &dummy_IDT),
};
// GDT
};
// GDT
-u64 rombios32_gdt[] VAR16
_32
__aligned(8) = {
+u64 rombios32_gdt[] VAR16
VISIBLE
__aligned(8) = {
// First entry can't be used.
0x0000000000000000LL,
// 32 bit flat code segment (SEG32_MODE32_CS)
// First entry can't be used.
0x0000000000000000LL,
// 32 bit flat code segment (SEG32_MODE32_CS)
-
0x00cf9b000000ffffLL
,
+
GDT_GRANLIMIT(0xffffffff) | GDT_CODE | GDT_B
,
// 32 bit flat data segment (SEG32_MODE32_DS)
// 32 bit flat data segment (SEG32_MODE32_DS)
-
0x00cf93000000ffffLL
,
+
GDT_GRANLIMIT(0xffffffff) | GDT_DATA | GDT_B
,
// 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
// 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
-
0x00009b0f0000ffffLL
,
+
GDT_LIMIT(BUILD_BIOS_SIZE-1) | GDT_CODE | GDT_BASE(BUILD_BIOS_ADDR)
,
// 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
// 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
-
0x000093000000ffffLL
,
- // 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS)
-
0x008f9b000000ffffLL
,
+
GDT_LIMIT(0x0ffff) | GDT_DATA
,
+ // 16 bit code segment base=0
xf0000
limit=0xffffffff (SEG32_MODE16BIG_CS)
+
GDT_GRANLIMIT(0xffffffff) | GDT_CODE | GDT_BASE(BUILD_BIOS_ADDR)
,
// 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
// 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
-
0x008f93000000ffffLL
,
+
GDT_GRANLIMIT(0xffffffff) | GDT_DATA
,
};
// GDT descriptor
};
// GDT descriptor
-struct descloc_s rombios32_gdt_48 VAR16
_32
= {
+struct descloc_s rombios32_gdt_48 VAR16
VISIBLE
= {
.length = sizeof(rombios32_gdt) - 1,
.length = sizeof(rombios32_gdt) - 1,
- .addr = (u32)MAKE_F
AR
PTR(SEG_BIOS, rombios32_gdt),
+ .addr = (u32)MAKE_F
LAT
PTR(SEG_BIOS, rombios32_gdt),
};
};