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Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git]
/
src
/
mainboard
/
tyan
/
s2912_fam10
/
Kconfig
diff --git
a/src/mainboard/tyan/s2912_fam10/Kconfig
b/src/mainboard/tyan/s2912_fam10/Kconfig
index eb841dbd7e3587fc78c6bb763690f527c7666f13..58cdb9c83ca52e88777757b650b4a7d0af78a306 100644
(file)
--- a/
src/mainboard/tyan/s2912_fam10/Kconfig
+++ b/
src/mainboard/tyan/s2912_fam10/Kconfig
@@
-1,158
+1,111
@@
-config BOARD_TYAN_S2912_FAM10
- bool "S2912_FAM10"
+if BOARD_TYAN_S2912_FAM10
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
select ARCH_X86
select ARCH_X86
- select CPU_AMD_K8
select CPU_AMD_SOCKET_F_1207
select CPU_AMD_SOCKET_F_1207
+ select DIMM_DDR2
+ select DIMM_REGISTERED
select NORTHBRIDGE_AMD_AMDFAM10
select NORTHBRIDGE_AMD_AMDFAM10
- select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55
select SOUTHBRIDGE_NVIDIA_MCP55
+ select MCP55_USE_NIC
select SUPERIO_WINBOND_W83627HF
select SUPERIO_WINBOND_W83627HF
+ select HAVE_BUS_CONFIG
+ select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
- select USE_DCACHE_RAM
select HAVE_HARD_RESET
select HAVE_HARD_RESET
- select IOAPIC
- select MEM_TRAIN_SEQ
- select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select LIFT_BSP_APIC_ID
select BOARD_ROMSIZE_KB_1024
select BOARD_ROMSIZE_KB_1024
+ select RAMINIT_SYSINFO
+ select ENABLE_APIC_EXT_ID
+ select AMDMCT
+ select TINY_BOOTBLOCK
+ select MMCONF_SUPPORT_DEFAULT
+ select QRANK_DIMM_SUPPORT
config MAINBOARD_DIR
string
default tyan/s2912_fam10
config MAINBOARD_DIR
string
default tyan/s2912_fam10
- depends on BOARD_TYAN_S2912_FAM10
config DCACHE_RAM_BASE
hex
config DCACHE_RAM_BASE
hex
- default 0xc8000
- depends on BOARD_TYAN_S2912_FAM10
-
+ default 0xc4000
+
config DCACHE_RAM_SIZE
hex
config DCACHE_RAM_SIZE
hex
- default 0x08000
- depends on BOARD_TYAN_S2912_FAM10
+ default 0x0c000
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
- default 0x01000
- depends on BOARD_TYAN_S2912_FAM10
+ default 0x04000
config APIC_ID_OFFSET
config APIC_ID_OFFSET
- hex
- default 16
- depends on BOARD_TYAN_S2912_FAM10
+ hex
+ default 0
-config
SB_HT_CHAIN_ON_BUS0
+config
MEM_TRAIN_SEQ
int
default 2
int
default 2
- depends on BOARD_TYAN_S2912_FAM10
-
-config LB_CKS_RANGE_START
- int
- default 49
- depends on BOARD_TYAN_S2912_FAM10
-config LB_CKS_RANGE_END
- int
- default 122
- depends on BOARD_TYAN_S2912_FAM10
-
-config LB_CKS_LOC
+config SB_HT_CHAIN_ON_BUS0
int
int
- default 123
- depends on BOARD_TYAN_S2912_FAM10
+ default 2
config MAINBOARD_PART_NUMBER
string
default "S2912 (Fam10)"
config MAINBOARD_PART_NUMBER
string
default "S2912 (Fam10)"
- depends on BOARD_TYAN_S2912_FAM10
config PCI_64BIT_PREF_MEM
config PCI_64BIT_PREF_MEM
- bool
- default n
- depends on BOARD_TYAN_S2912_FAM10
-
-config HAVE_FALLBACK_BOOT
bool
default n
bool
default n
- depends on BOARD_TYAN_S2912_FAM10
-
-config USE_FALLBACK_IMAGE
- bool
- default n
- depends on BOARD_TYAN_S2912_FAM10
-
-config HW_MEM_HOLE_SIZEK
- hex
- default 0x100000
- depends on BOARD_TYAN_S2912_FAM10
config MAX_CPUS
int
config MAX_CPUS
int
- default 2
- depends on BOARD_TYAN_S2912_FAM10
+ default 12
config MAX_PHYSICAL_CPUS
int
config MAX_PHYSICAL_CPUS
int
- default 1
- depends on BOARD_TYAN_S2912_FAM10
-
-config HW_MEM_HOLE_SIZE_AUTO_INC
- bool
- default n
- depends on BOARD_TYAN_S2912_FAM10
+ default 2
config HT_CHAIN_UNITID_BASE
hex
config HT_CHAIN_UNITID_BASE
hex
- default 0x0
- depends on BOARD_TYAN_S2912_FAM10
+ default 0x1
config HT_CHAIN_END_UNITID_BASE
config HT_CHAIN_END_UNITID_BASE
- hex
- default 0x0
- depends on BOARD_TYAN_S2912_FAM10
-
-config USE_INIT
- bool
- default n
- depends on BOARD_TYAN_S2912_FAM10
+ hex
+ default 0x20
config SERIAL_CPU_INIT
config SERIAL_CPU_INIT
- bool
- default n
- depends on BOARD_TYAN_S2912_FAM10
-
-config WAIT_BEFORE_CPUS_INIT
- bool
+ bool
default n
default n
- depends on BOARD_TYAN_S2912_FAM10
-
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
- hex
- default 0x10f1
- depends on BOARD_TYAN_S2912_FAM10
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0x2912
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0x2912
- depends on BOARD_TYAN_S2912_FAM10
config IRQ_SLOT_COUNT
int
default 11
config IRQ_SLOT_COUNT
int
default 11
- depends on BOARD_TYAN_S2912_FAM10
config AMD_UCODE_PATCH_FILE
string
default "mc_patch_01000095.h"
config AMD_UCODE_PATCH_FILE
string
default "mc_patch_01000095.h"
- depends on BOARD_TYAN_S2912_FAM10
-config ENABLE_APIC_EXT_ID
- bool
- default y
- depends on BOARD_TYAN_S2912_FAM10
+config RAMBASE
+ hex
+ default 0x200000
-config AMDMCT
- bool
- default y
- depends on BOARD_TYAN_S2912_FAM10
+config RAMTOP
+ hex
+ default 0x1000000
+
+config HEAP_SIZE
+ hex
+ default 0xc0000
+
+config MCP55_PCI_E_X_0
+ int
+ default 1
+
+endif # BOARD_TYAN_S2912_FAM10