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nvidia/mcp55: Move HAVE_HARD_RESET to southbridge
[coreboot.git]
/
src
/
mainboard
/
tyan
/
s2912
/
Kconfig
diff --git
a/src/mainboard/tyan/s2912/Kconfig
b/src/mainboard/tyan/s2912/Kconfig
index c2a7ed00ddb8da777415f5c45a12710d100b75d0..192b4ff151c7e09bf6d1a9397ae8499804f4fa6f 100644
(file)
--- a/
src/mainboard/tyan/s2912/Kconfig
+++ b/
src/mainboard/tyan/s2912/Kconfig
@@
-1,107
+1,89
@@
-config BOARD_TYAN_S2912
- bool "S2912 (Thunder n3600R)"
+if BOARD_TYAN_S2912
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
select ARCH_X86
select CPU_AMD_SOCKET_F
select ARCH_X86
select CPU_AMD_SOCKET_F
+ select DIMM_DDR2
+ select DIMM_REGISTERED
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55
+ select MCP55_USE_NIC
select SUPERIO_WINBOND_W83627HF
select HAVE_BUS_CONFIG
select SUPERIO_WINBOND_W83627HF
select HAVE_BUS_CONFIG
+ select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select USE_PRINTK_IN_CAR
- select USE_DCACHE_RAM
- select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select K8_REV_F_SUPPORT
select BOARD_ROMSIZE_KB_512
select LIFT_BSP_APIC_ID
select K8_REV_F_SUPPORT
select BOARD_ROMSIZE_KB_512
+ select RAMINIT_SYSINFO
+ select QRANK_DIMM_SUPPORT
+ select K8_ALLOCATE_IO_RANGE
config MAINBOARD_DIR
string
default tyan/s2912
config MAINBOARD_DIR
string
default tyan/s2912
- depends on BOARD_TYAN_S2912
config DCACHE_RAM_BASE
hex
default 0xc8000
config DCACHE_RAM_BASE
hex
default 0xc8000
- depends on BOARD_TYAN_S2912
config DCACHE_RAM_SIZE
hex
default 0x08000
config DCACHE_RAM_SIZE
hex
default 0x08000
- depends on BOARD_TYAN_S2912
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
- depends on BOARD_TYAN_S2912
config APIC_ID_OFFSET
hex
default 0x10
config APIC_ID_OFFSET
hex
default 0x10
- depends on BOARD_TYAN_S2912
config MEM_TRAIN_SEQ
int
default 1
config MEM_TRAIN_SEQ
int
default 1
- depends on BOARD_TYAN_S2912
config SB_HT_CHAIN_ON_BUS0
int
default 2
config SB_HT_CHAIN_ON_BUS0
int
default 2
- depends on BOARD_TYAN_S2912
config MAINBOARD_PART_NUMBER
string
default "S2912"
config MAINBOARD_PART_NUMBER
string
default "S2912"
- depends on BOARD_TYAN_S2912
config PCI_64BIT_PREF_MEM
bool
config PCI_64BIT_PREF_MEM
bool
- default n
- depends on BOARD_TYAN_S2912
-
-config HW_MEM_HOLE_SIZEK
- hex
- default 0x100000
- depends on BOARD_TYAN_S2912
+ default n
config MAX_CPUS
int
default 4
config MAX_CPUS
int
default 4
- depends on BOARD_TYAN_S2912
config MAX_PHYSICAL_CPUS
int
default 2
config MAX_PHYSICAL_CPUS
int
default 2
- depends on BOARD_TYAN_S2912
-
-config HW_MEM_HOLE_SIZE_AUTO_INC
- bool
- default n
- depends on BOARD_TYAN_S2912
config HT_CHAIN_UNITID_BASE
hex
default 0x0
config HT_CHAIN_UNITID_BASE
hex
default 0x0
- depends on BOARD_TYAN_S2912
config HT_CHAIN_END_UNITID_BASE
hex
default 0x20
config HT_CHAIN_END_UNITID_BASE
hex
default 0x20
- depends on BOARD_TYAN_S2912
config SERIAL_CPU_INIT
bool
default n
config SERIAL_CPU_INIT
bool
default n
- depends on BOARD_TYAN_S2912
-
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
- hex
- default 0x2912
- depends on BOARD_TYAN_S2912
config IRQ_SLOT_COUNT
int
default 11
config IRQ_SLOT_COUNT
int
default 11
- depends on BOARD_TYAN_S2912
+
+config MCP55_PCI_E_X_0
+ int
+ default 1
+
+endif # BOARD_TYAN_S2912