projects
/
coreboot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
devicetree.cb: Only add as many entries as there are DIMM slots.
[coreboot.git]
/
src
/
mainboard
/
technexion
/
tim8690
/
dsdt.asl
diff --git
a/src/mainboard/technexion/tim8690/dsdt.asl
b/src/mainboard/technexion/tim8690/dsdt.asl
index 3ba436e0d24006323f584c696c75761263c7230c..e2b6bd160f60bf486916d49489c2c1214cbda646 100644
(file)
--- a/
src/mainboard/technexion/tim8690/dsdt.asl
+++ b/
src/mainboard/technexion/tim8690/dsdt.asl
@@
-1129,7
+1129,7
@@
DefinitionBlock (
/* Note: Only need HID on Primary Bus */
Device(PCI0) {
External (TOM1)
/* Note: Only need HID on Primary Bus */
Device(PCI0) {
External (TOM1)
- External (TOM2)
+ External (TOM2)
/* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */
Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */
@@
-1557,7
+1557,8
@@
DefinitionBlock (
/*
* If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
/*
* If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
- * Subtract(TOM2, 0x100000000, DMHL)
+ * ShiftLeft(TOM2, 20, Local0)
+ * Subtract(Local0, 0x100000000, DMHL)
* }
*/
* }
*/