+ /* PCIe slots */
+ PCI_INT(0x2, 0x00, 0x00, 0x10);
+ PCI_INT(0x2, 0x00, 0x01, 0x11);
+ PCI_INT(0x2, 0x00, 0x02, 0x12);
+ PCI_INT(0x2, 0x00, 0x03, 0x13);
+
+ /* PCIe slots */
+ PCI_INT(0x3, 0x00, 0x00, 0x11);
+ PCI_INT(0x3, 0x00, 0x01, 0x12);
+ PCI_INT(0x3, 0x00, 0x02, 0x13);
+ PCI_INT(0x3, 0x00, 0x03, 0x10);
+
+ /* PCIe slots */
+ PCI_INT(0x4, 0x00, 0x00, 0x12);
+ PCI_INT(0x4, 0x00, 0x01, 0x13);
+ PCI_INT(0x4, 0x00, 0x02, 0x10);
+ PCI_INT(0x4, 0x00, 0x03, 0x11);
+
+ /* PCIe slots */
+ PCI_INT(0x5, 0x00, 0x00, 0x13);
+ PCI_INT(0x5, 0x00, 0x01, 0x10);
+ PCI_INT(0x5, 0x00, 0x02, 0x11);
+ PCI_INT(0x5, 0x00, 0x03, 0x12);
+
+ /* onboard NIC ? */
+ PCI_INT(bus_sb600[1], 0x7, 0x0, 0x13);
+ PCI_INT(bus_sb600[1], 0x7, 0x1, 0x10);
+ PCI_INT(bus_sb600[1], 0x7, 0x2, 0x11);
+ PCI_INT(bus_sb600[1], 0x7, 0x3, 0x12);
+
+ /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
+ mptable_lintsrc(mc, isa_bus);
+
+ /* Compute the checksums */
+ return mptable_finalize(mc);