projects
/
coreboot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Merge all spd_addr.h into the resp. romstage.c files.
[coreboot.git]
/
src
/
mainboard
/
msi
/
ms9652_fam10
/
romstage.c
diff --git
a/src/mainboard/msi/ms9652_fam10/romstage.c
b/src/mainboard/msi/ms9652_fam10/romstage.c
index 91de47728345eae66ec0469abd1d0ad767b5993f..4ee1eebbb3915bcbd92315c69503d0c19b63afd1 100644
(file)
--- a/
src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/
src/mainboard/msi/ms9652_fam10/romstage.c
@@
-33,6
+33,7
@@
#include <console/console.h>
#include <usbdebug.h>
#include <lib.h>
#include <console/console.h>
#include <usbdebug.h>
#include <lib.h>
+#include <spd.h>
#include <cpu/amd/model_10xxx_rev.h>
#include <cpu/amd/model_10xxx_rev.h>
@@
-116,7
+117,14
@@
static void sio_setup(void)
pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
}
pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
}
-#include "spd_addr.h"
+static const u8 spd_addr[] = {
+ //first node
+ RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
+#if CONFIG_MAX_PHYSICAL_CPUS > 1
+ //second node
+ RC00, DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0,
+#endif
+};
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{