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Deduplicate various ACPI .asl files.
[coreboot.git]
/
src
/
mainboard
/
amd
/
mahogany_fam10
/
dsdt.asl
diff --git
a/src/mainboard/amd/mahogany_fam10/dsdt.asl
b/src/mainboard/amd/mahogany_fam10/dsdt.asl
index 04106dbc4dea6157589c698350a1a440a13fe43e..e14467d668e466d06cda1b8a939c3048c89b27dd 100644
(file)
--- a/
src/mainboard/amd/mahogany_fam10/dsdt.asl
+++ b/
src/mainboard/amd/mahogany_fam10/dsdt.asl
@@
-27,7
+27,7
@@
DefinitionBlock (
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
- /* #include "
acpi/debug.asl" */
/* Include global debug methods if needed */
+ /* #include "
../../../arch/i386/acpi/debug.asl" */
/* Include global debug methods if needed */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
@@
-1162,13
+1162,13
@@
DefinitionBlock (
/* South Bridge */
Scope(\_SB) { /* Start \_SB scope */
/* South Bridge */
Scope(\_SB) { /* Start \_SB scope */
- #include "acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+ #include "
../../../arch/i386/
acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
/* _SB.PCI0 */
/* Note: Only need HID on Primary Bus */
Device(PCI0) {
External (TOM1)
/* _SB.PCI0 */
/* Note: Only need HID on Primary Bus */
Device(PCI0) {
External (TOM1)
- External (TOM2)
+ External (TOM2)
/* (<real tom2> >> 20) to make it fit into 32 bit for XP */
Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */
Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
Method(_BBN, 0) { /* Bus number = 0 */
@@
-1366,7
+1366,7
@@
DefinitionBlock (
/* Real Time Clock Device */
Device(RTC0) {
/* Real Time Clock Device */
Device(RTC0) {
- Name(_HID, EISAID("PNP0B0
1")) /* AT Real Time Clock
*/
+ Name(_HID, EISAID("PNP0B0
0")) /* AT Real Time Clock (not PIIX4 compatible)
*/
Name(_CRS, ResourceTemplate() {
IRQNoFlags(){8}
IO(Decode16,0x0070, 0x0070, 0, 2)
Name(_CRS, ResourceTemplate() {
IRQNoFlags(){8}
IO(Decode16,0x0070, 0x0070, 0, 2)
@@
-1614,7
+1614,8
@@
DefinitionBlock (
/*
* If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
/*
* If(LNotEqual(TOM2, 0x00000000)){
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
- * Subtract(TOM2, 0x100000000, DMHL)
+ * ShiftLeft(TOM2, 20, Local0)
+ * Subtract(Local0, 0x100000000, DMHL)
* }
*/
* }
*/