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printk_foo -> printk(BIOS_FOO, ...)
[coreboot.git]
/
src
/
cpu
/
intel
/
model_6ex
/
cache_as_ram_disable.c
diff --git
a/src/cpu/intel/model_6ex/cache_as_ram_disable.c
b/src/cpu/intel/model_6ex/cache_as_ram_disable.c
index cbf7cdd37b0df82e66d7e336a2bb8715fa7a1390..44ff26481840b917c184c5a3dc2cd640a8774b98 100644
(file)
--- a/
src/cpu/intel/model_6ex/cache_as_ram_disable.c
+++ b/
src/cpu/intel/model_6ex/cache_as_ram_disable.c
@@
-37,13
+37,13
@@
void stage1_main(unsigned long bist)
"movl %%esp, %0\n"
: "=a" (v_esp)
);
"movl %%esp, %0\n"
: "=a" (v_esp)
);
- printk
_spew(
"v_esp=%08x\n", v_esp);
+ printk
(BIOS_SPEW,
"v_esp=%08x\n", v_esp);
#endif
cpu_reset_x:
#endif
cpu_reset_x:
- printk
_spew(
"cpu_reset = %08x\n", cpu_reset);
- printk
_spew(
"No cache as ram now - ");
+ printk
(BIOS_SPEW,
"cpu_reset = %08x\n", cpu_reset);
+ printk
(BIOS_SPEW,
"No cache as ram now - ");
/* store cpu_reset to ebx */
__asm__ volatile (
/* store cpu_reset to ebx */
__asm__ volatile (
@@
-83,5
+83,5
@@
cpu_reset_x:
}
/* We will not return */
}
/* We will not return */
- printk
_debug(
"sorry. parachute did not open.\n");
+ printk
(BIOS_DEBUG,
"sorry. parachute did not open.\n");
}
}