+#if CONFIG_K8_REV_F_SUPPORT == 0
+ if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
+ /* D0 later don't need it */
+ /* Erratum 86 Disable data masking on C0 and
+ * later processor revs.
+ * FIXME this is only needed if ECC is enabled.
+ */
+ msr.hi |= 1 << (36 - 32);
+ }
+#endif
+ /* Erratum 89 ... */
+ /* Erratum 89 is mistakenly labeled as 88 in AMD pub #25759
+ * It is correctly labeled as 89 on page 49 of the document
+ * and in AMD pub#33610
+ */
+ msr.lo |= 1 << 3;
+ /* Erratum 169 */
+ /* This supersedes erratum 131; 131 should not be applied with 169
+ * We also need to set some bits in the northbridge, handled in src/northbridge/amdk8/
+ */
+ msr.hi |= 1;
+
+ wrmsr(NB_CFG_MSR, msr);
+ }