+// Various memory addresses used by the code.
+#define BUILD_STACK_ADDR 0xfffe
+#define BUILD_CPU_COUNT_ADDR 0xf000
+#define BUILD_AP_BOOT_ADDR 0x10000
+#define BUILD_BSS_ADDR 0x40000
+#define BUILD_BIOS_ADDR 0xf0000
+#define BUILD_BIOS_SIZE 0x10000
+ /* 64 KB used to copy the BIOS to shadow RAM */
+#define BUILD_BIOS_TMP_ADDR 0x30000
+
+#define BUILD_PM_IO_BASE 0xb000
+#define BUILD_SMB_IO_BASE 0xb100
+#define BUILD_SMI_CMD_IO_ADDR 0xb2
+
+// Start of fixed addresses in 0xf0000 segment.
+#define BUILD_START_FIXED 0xe050
+
+// Important 16-bit segments
+#define SEG_BIOS 0xf000
+#define SEG_EBDA 0x9fc0
+#define SEG_BDA 0x0000
+
+// Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater
+// than the specified value, then the corresponding irq handler will
+// report every enter event.
+#define DEBUG_ISR_nmi 1
+#define DEBUG_HDL_05 1
+#define DEBUG_ISR_08 20
+#define DEBUG_ISR_09 9
+#define DEBUG_ISR_0e 9
+#define DEBUG_HDL_10 20
+#define DEBUG_HDL_11 1
+#define DEBUG_HDL_12 1
+#define DEBUG_HDL_13 10
+#define DEBUG_HDL_14 1
+#define DEBUG_HDL_15 9
+#define DEBUG_HDL_16 9
+#define DEBUG_HDL_17 1
+#define DEBUG_HDL_18 1
+#define DEBUG_HDL_19 1
+#define DEBUG_HDL_1a 9
+#define DEBUG_ISR_1c 20
+#define DEBUG_HDL_40 1
+#define DEBUG_ISR_70 9
+#define DEBUG_ISR_74 9
+#define DEBUG_ISR_75 1
+#define DEBUG_ISR_76 10
+#define DEBUG_ISR_hwirq 30
+