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CBMEM CONSOLE: Add code using the new console driver.
[coreboot.git]
/
src
/
boot
/
hardwaremain.c
diff --git
a/src/boot/hardwaremain.c
b/src/boot/hardwaremain.c
index 686b09576fbec249cc96383de33b7ea454514037..9b293c049a61833899abc886fb0cb7395ead7afe 100644
(file)
--- a/
src/boot/hardwaremain.c
+++ b/
src/boot/hardwaremain.c
@@
-45,10
+45,10
@@
it with the version available from LANL.
/**
* @brief Main function of the RAM part of coreboot.
*
/**
* @brief Main function of the RAM part of coreboot.
*
- * Coreboot is divided into Pre-RAM part and RAM part.
- *
+ * Coreboot is divided into Pre-RAM part and RAM part.
+ *
* Device Enumeration:
* Device Enumeration:
- * In the dev_enumerate() phase,
+ * In the dev_enumerate() phase,
*/
void hardwaremain(int boot_complete);
*/
void hardwaremain(int boot_complete);
@@
-57,18
+57,18
@@
void hardwaremain(int boot_complete)
{
struct lb_memory *lb_mem;
{
struct lb_memory *lb_mem;
- post_code(
0x80
);
+ post_code(
POST_ENTRY_RAMSTAGE
);
/* console_init() MUST PRECEDE ALL printk()! */
console_init();
/* console_init() MUST PRECEDE ALL printk()! */
console_init();
-
- post_code(0x39);
- printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
+ post_code(POST_CONSOLE_READY);
+
+ printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
coreboot_version, coreboot_extra_version, coreboot_build,
(boot_complete)?"rebooting":"booting");
coreboot_version, coreboot_extra_version, coreboot_build,
(boot_complete)?"rebooting":"booting");
- post_code(
0x40
);
+ post_code(
POST_CONSOLE_BOOT_MSG
);
/* If we have already booted attempt a hard reboot */
if (boot_complete) {
/* If we have already booted attempt a hard reboot */
if (boot_complete) {
@@
-76,22
+76,25
@@
void hardwaremain(int boot_complete)
}
/* FIXME: Is there a better way to handle this? */
}
/* FIXME: Is there a better way to handle this? */
- init_timer();
+ init_timer();
/* Find the devices we don't have hard coded knowledge about. */
dev_enumerate();
/* Find the devices we don't have hard coded knowledge about. */
dev_enumerate();
- post_code(
0x66
);
+ post_code(
POST_DEVICE_ENUMERATION_COMPLETE
);
/* Now compute and assign the bus resources. */
dev_configure();
/* Now compute and assign the bus resources. */
dev_configure();
- post_code(
0x88
);
+ post_code(
POST_DEVICE_CONFIGURATION_COMPLETE
);
/* Now actually enable devices on the bus */
dev_enable();
/* And of course initialize devices on the bus */
dev_initialize();
/* Now actually enable devices on the bus */
dev_enable();
/* And of course initialize devices on the bus */
dev_initialize();
- post_code(
0x89
);
+ post_code(
POST_DEVICES_ENABLED
);
#if CONFIG_WRITE_HIGH_TABLES == 1
cbmem_initialize();
#if CONFIG_WRITE_HIGH_TABLES == 1
cbmem_initialize();
+#if CONFIG_CONSOLE_CBMEM
+ cbmemc_reinit();
+#endif
#endif
#if CONFIG_HAVE_ACPI_RESUME == 1
suspend_resume();
#endif
#if CONFIG_HAVE_ACPI_RESUME == 1
suspend_resume();