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Prepare the BIOS data areas before device init.
[coreboot.git]
/
src
/
arch
/
x86
/
lib
/
Makefile.inc
diff --git
a/src/arch/x86/lib/Makefile.inc
b/src/arch/x86/lib/Makefile.inc
index 3388a9dea30d7c75f5f482ec75e9567ba936bb38..8f5fd5f1ebda7cdfcad22deba44526565e0a88b7 100644
(file)
--- a/
src/arch/x86/lib/Makefile.inc
+++ b/
src/arch/x86/lib/Makefile.inc
@@
-1,15
+1,20
@@
ramstage-y += c_start.S
ramstage-y += cpu.c
ramstage-y += pci_ops_conf1.c
ramstage-y += c_start.S
ramstage-y += cpu.c
ramstage-y += pci_ops_conf1.c
-ramstage-y += pci_ops_conf2.c
-
+ramstage-$(CONFIG_PCI_CONF2) += pci_ops_conf2.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
-
ramstage-y += pci_ops_auto.c
ramstage-y += exception.c
ramstage-$(CONFIG_IOAPIC) += ioapic.c
ramstage-y += pci_ops_auto.c
ramstage-y += exception.c
ramstage-$(CONFIG_IOAPIC) += ioapic.c
+ramstage-y += memset.c
+ramstage-y += memcpy.c
+ramstage-y += ebda.c
romstage-y += romstage_console.c
romstage-y += cbfs_and_run.c
romstage-y += romstage_console.c
romstage-y += cbfs_and_run.c
+romstage-y += memset.c
+romstage-y += memcpy.c
+
+smm-y += memcpy.c
$(obj)/arch/x86/lib/console.ramstage.o :: $(obj)/build.h
$(obj)/arch/x86/lib/console.ramstage.o :: $(obj)/build.h