+crt0s = $(src)/arch/i386/init/prologue.inc
+ldscripts =
+ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
+ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
+crt0s += $(src)/cpu/x86/16bit/entry16.inc
+ldscripts += $(src)/cpu/x86/16bit/entry16.lds
+endif
+crt0s += $(src)/cpu/x86/32bit/entry32.inc
+ldscripts += $(src)/cpu/x86/32bit/entry32.lds
+ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
+crt0s += $(src)/cpu/x86/16bit/reset16.inc
+ldscripts += $(src)/cpu/x86/16bit/reset16.lds
+crt0s += $(src)/arch/i386/lib/id.inc
+ldscripts += $(src)/arch/i386/lib/id.lds
+endif
+
+crt0s += $(src)/cpu/x86/fpu_enable.inc
+ifeq ($(CONFIG_SSE),y)
+crt0s += $(src)/cpu/x86/sse_enable.inc
+endif
+
+crt0s += $(cpu_incs)
+
+#
+# FIXME move to CPU_INTEL_SOCKET_MPGA604
+#
+ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
+crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
+endif
+
+ifeq ($(CONFIG_LLSHELL),y)
+crt0s += $(src)/arch/i386/llshell/llshell.inc
+endif
+
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
+
+ifeq ($(CONFIG_SSE),y)
+crt0s += $(src)/cpu/x86/sse_disable.inc
+endif
+ifeq ($(CONFIG_MMX),y)
+crt0s += $(src)/cpu/x86/mmx_disable.inc
+endif
+
+ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
+crt0s += $(chipset_bootblock_inc)
+ldscripts += $(chipset_bootblock_lds)
+endif
+
+ifeq ($(CONFIG_ROMCC),y)
+crt0s += $(src)/arch/i386/init/crt0_romcc_epilogue.inc