- u32 fmint = read32(OHCI0_HC_FM_INTERVAL) & 0x3fff;
- if(fmint != FI)
- gecko_printf("ohci-- fminterval delta: %d\n", fmint - FI);
- fmint |= FSMP (fmint) << 16;
-
- /* enable interrupts of both usb host controllers */
- set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
-
-
-
- u32 temp = 0;
- u32 hcctrl = read32(OHCI0_HC_CONTROL);
- switch(hcctrl & OHCI_CTRL_HCFS) {
- case OHCI_USB_OPER:
- temp = 0;
- break;
- case OHCI_USB_SUSPEND:
- case OHCI_USB_RESUME:
- hcctrl &= OHCI_CTRL_RWC;
- hcctrl |= OHCI_USB_RESUME;
- temp = 10;
- break;
- case OHCI_USB_RESET:
- hcctrl &= OHCI_CTRL_RWC;
- hcctrl |= OHCI_USB_RESET;
- temp = 50;
- break;
- }
- write32(OHCI0_HC_CONTROL, hcctrl);
- (void) read32(OHCI0_HC_CONTROL);
- udelay(temp*1000);
-
- memset(&hcca_oh0, 0, sizeof(struct ohci_hcca));
-
-
- dbg_op_state();
-
-
- /* reset HC */
- write32(OHCI0_HC_COMMAND_STATUS, OHCI_HCR);
-
- /* wait max. 30us */
- u32 ts = 30;
- while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
- if(--ts == 0) {
- gecko_printf("ohci-- FAILED");
- return;
- }
- udelay(1);
- }
-
- /* disable interrupts; 2ms timelimit here!
- now we're in the SUSPEND state ... must go OPERATIONAL
- within 2msec else HC enters RESUME */
-
-
- u32 cookie = irq_kill();
-
- /* Tell the controller where the control and bulk lists are
- * The lists are empty now. */
- write32(OHCI0_HC_CTRL_HEAD_ED, 0);
- write32(OHCI0_HC_BULK_HEAD_ED, 0);
-
- /* set hcca adress */
- write32(OHCI0_HC_HCCA, dma_addr(&hcca_oh0));
-
- /* set periodicstart */
+ u32 fmint = read32(OHCI0_HC_FM_INTERVAL) & 0x3fff;
+ if(fmint != FI)
+ printf("ohci-- fminterval delta: %d\n", fmint - FI);
+ fmint |= FSMP (fmint) << 16;
+
+ /* enable interrupts of both usb host controllers */
+ set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
+
+ /* reset HC */
+ write32(OHCI0_HC_COMMAND_STATUS, OHCI_HCR);
+
+ /* wait max. 30us */
+ u32 ts = 30;
+ while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
+ if(--ts == 0) {
+ printf("ohci-- FAILED");
+ return;
+ }
+ udelay(1);
+ }
+
+ /* disable interrupts; 2ms timelimit here!
+ now we're in the SUSPEND state ... must go OPERATIONAL
+ within 2msec else HC enters RESUME */
+
+ u32 cookie = irq_kill();
+
+ /* Tell the controller where the control and bulk lists are
+ * The lists are empty now. */
+ write32(OHCI0_HC_CTRL_HEAD_ED, 0);
+ write32(OHCI0_HC_BULK_HEAD_ED, 0);
+
+ /* set hcca adress */
+ sync_after_write(&hcca_oh0, 256);
+ write32(OHCI0_HC_HCCA, virt_to_phys(&hcca_oh0));
+
+ /* set periodicstart */