-void ohci_init() {
- gecko_printf("ohci-- init\n");
- dbg_op_state();
- /*
- u32 i = 0;
- for(; i <= 0x200; i+=4) {
- gecko_printf("0x0d050000 + %X: %X\n", i, read32(0x0d050000+i));
- udelay(10000); //'cause usb gecko is lame
- }
- * see output in ohci.default
- */
-
- /* enable interrupts of both usb host controllers */
- set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
-
- /* reset HC */
- set32(OHCI0_HC_COMMAND_STATUS, OHCI_HCR);
-
- /* wait max. 30us */
- u32 ts = 30;
- while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
- if(--ts == 0) {
- gecko_printf("ohci-- FAILED");
- return;
- }
- udelay(1);
- }
-
- /* disable interrupts; 2ms timelimit here!
- now we're in the SUSPEND state ... must go OPERATIONAL
- within 2msec else HC enters RESUME */
-
-
- //u32 cookie = irq_kill();
- u32 cookie;
- _CPU_ISR_Disable(cookie);
-
-
- /* Tell the controller where the control and bulk lists are
- * The lists are empty now. */
- write32(OHCI0_HC_CTRL_HEAD_ED, 0);
- write32(OHCI0_HC_BULK_HEAD_ED, 0);
-
- /* set hcca adress */
- write32(OHCI0_HC_HCCA, dma_addr(&hcca_oh0));
-
- /* set periodicstart */
+void ohci_init()
+{
+ printf("ohci-- init\n");
+ dbg_op_state();
+
+ /* disable hc interrupts */
+ set32(OHCI0_HC_INT_DISABLE, OHCI_INTR_MIE);
+
+ /* save fmInterval and calculate FSMPS */
+#define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
+#define FI 0x2edf /* 12000 bits per frame (-1) */
+ u32 fmint = read32(OHCI0_HC_FM_INTERVAL) & 0x3fff;
+ if(fmint != FI)
+ printf("ohci-- fminterval delta: %d\n", fmint - FI);
+ fmint |= FSMP (fmint) << 16;
+
+ /* enable interrupts of both usb host controllers */
+ set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
+
+ /* reset HC */
+ write32(OHCI0_HC_COMMAND_STATUS, OHCI_HCR);
+
+ /* wait max. 30us */
+ u32 ts = 30;
+ while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
+ if(--ts == 0) {
+ printf("ohci-- FAILED");
+ return;
+ }
+ udelay(1);
+ }
+
+ /* disable interrupts; 2ms timelimit here!
+ now we're in the SUSPEND state ... must go OPERATIONAL
+ within 2msec else HC enters RESUME */
+
+ u32 cookie = irq_kill();
+
+ /* Tell the controller where the control and bulk lists are
+ * The lists are empty now. */
+ write32(OHCI0_HC_CTRL_HEAD_ED, 0);
+ write32(OHCI0_HC_BULK_HEAD_ED, 0);
+
+ /* set hcca adress */
+ sync_after_write(&hcca_oh0, 256);
+ write32(OHCI0_HC_HCCA, virt_to_phys(&hcca_oh0));
+
+ /* set periodicstart */