+ /* Check that the stack is aligned */
+#if defined(__default_codegen__)
+ amd64_mov_reg_reg (code, AMD64_R11, AMD64_RSP, sizeof (mgreg_t));
+ amd64_alu_reg_imm (code, X86_AND, AMD64_R11, 15);
+ amd64_alu_reg_imm (code, X86_CMP, AMD64_R11, 0);
+ br [0] = code;
+ amd64_branch_disp (code, X86_CC_Z, 0, FALSE);
+ if (aot) {
+ amd64_mov_reg_imm (code, AMD64_R11, 0);
+ amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, 0, 8);
+ } else {
+ amd64_mov_reg_imm (code, AMD64_RDI, tramp_type);
+ amd64_mov_reg_imm (code, AMD64_R11, stack_unaligned);
+ amd64_call_reg (code, AMD64_R11);
+ }
+ mono_amd64_patch (br [0], code);
+ //amd64_breakpoint (code);
+#endif
+