+ if (sig->param_count == 1) {
+ int dreg;
+
+ if (is_ldaddr) {
+ dreg = args [0]->inst_i0->dreg;
+ NULLIFY_INS (args [0]);
+ } else {
+ g_assert (args [0]->type == STACK_MP || args [0]->type == STACK_PTR);
+ dreg = alloc_ireg (cfg);
+ }
+
+ MONO_INST_NEW (cfg, ins, intrinsic->opcode);
+ ins->klass = cmethod->klass;
+ ins->sreg1 = args [1]->dreg;
+ ins->type = STACK_VTYPE;
+ ins->dreg = dreg;
+
+ MONO_ADD_INS (cfg->cbb, ins);
+ if (sig->params [0]->type == MONO_TYPE_R4)
+ ins->backend.spill_var = get_int_to_float_spill_area (cfg);
+ else if (sig->params [0]->type == MONO_TYPE_R8)
+ ins->backend.spill_var = get_double_spill_area (cfg);
+
+ if (!is_ldaddr) {
+ MONO_INST_NEW (cfg, ins, OP_STOREX_MEMBASE);
+ ins->dreg = args [0]->dreg;
+ ins->sreg1 = dreg;
+ MONO_ADD_INS (cfg->cbb, ins);
+ }
+ return ins;
+ }
+