+
+ case OP_RCONV_TO_I1:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+ amd64_widen_reg (code, ins->dreg, ins->dreg, TRUE, FALSE);
+ break;
+ case OP_RCONV_TO_U1:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+ amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
+ break;
+ case OP_RCONV_TO_I2:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+ amd64_widen_reg (code, ins->dreg, ins->dreg, TRUE, TRUE);
+ break;
+ case OP_RCONV_TO_U2:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+ amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE, TRUE);
+ break;
+ case OP_RCONV_TO_I4:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+ break;
+ case OP_RCONV_TO_U4:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+ break;
+ case OP_RCONV_TO_I8:
+ amd64_sse_cvtss2si_reg_reg_size (code, ins->dreg, ins->sreg1, 8);
+ break;
+ case OP_RCONV_TO_R8:
+ amd64_sse_cvtss2sd_reg_reg (code, ins->dreg, ins->sreg1);
+ break;
+ case OP_RCONV_TO_R4:
+ if (ins->dreg != ins->sreg1)
+ amd64_sse_movss_reg_reg (code, ins->dreg, ins->sreg1);
+ break;
+