- if (mono_arch_opcode_supported (OP_ATOMIC_ADD_I4)) {
- MonoInst *one_ins, *load_ins;
-
- EMIT_NEW_PCONST (cfg, load_ins, counter);
- EMIT_NEW_ICONST (cfg, one_ins, 1);
- MONO_INST_NEW (cfg, ins, OP_ATOMIC_ADD_I4);
- ins->dreg = mono_alloc_ireg (cfg);
- ins->inst_basereg = load_ins->dreg;
- ins->inst_offset = 0;
- ins->sreg2 = one_ins->dreg;
- ins->type = STACK_I4;
- MONO_ADD_INS (cfg->cbb, ins);
- } else {
- EMIT_NEW_PCONST (cfg, ins, counter);
- MONO_EMIT_NEW_STORE_MEMBASE_IMM (cfg, OP_STORE_MEMBASE_IMM, ins->dreg, 0, 1);
+ EMIT_NEW_PCONST (cfg, load_ins, counter);
+ EMIT_NEW_ICONST (cfg, one_ins, 1);
+ MONO_INST_NEW (cfg, ins, OP_ATOMIC_ADD_I4);
+ ins->dreg = mono_alloc_ireg (cfg);
+ ins->inst_basereg = load_ins->dreg;
+ ins->inst_offset = 0;
+ ins->sreg2 = one_ins->dreg;
+ ins->type = STACK_I4;
+ MONO_ADD_INS (cfg->cbb, ins);
+ } else {
+ EMIT_NEW_PCONST (cfg, ins, counter);
+ MONO_EMIT_NEW_STORE_MEMBASE_IMM (cfg, OP_STORE_MEMBASE_IMM, ins->dreg, 0, 1);
+ }