+
+ when EXT_7SEG_ADDR =>
+ ext_7seg.sel <='1';
+ ext_7seg.wr_en <= wb_reg_nxt.dmem_write_en;
+ ext_7seg.data <= ram_data;
+ ext_7seg.addr <= wb_reg_nxt.address(31 downto 2);
+ ext_7seg.byte_en(1 downto 0) <= wb_reg_nxt.address(1 downto 0);
+
+-- case wb_reg_nxt.address(1 downto 0) is
+-- when "00" => ext_7seg.byte_en <= "0001";
+-- when "01" => ext_7seg.byte_en <= "0010";
+-- when "10" => ext_7seg.byte_en <= "0100";
+-- when "11" => ext_7seg.byte_en <= "1000";
+-- when others => null;
+-- end case;