+ constant IMM_OPT : integer := 0; -- no sharing
+
+ constant SUB_OPT : integer := 1;
+ constant ARITH_OPT : integer := 1;
+ constant HWORD_OPT : integer := 1;
+ constant PUSH_OPT : integer := 1;
+ constant LOW_HIGH_OPT : integer := 1;
+ constant DIRECT_JUMP_OPT : integer := 1;
+
+ constant CARRY_OPT : integer := 2;
+ constant BYTE_OPT : integer := 2;
+ constant LDI_REPLACE_OPT : integer := 2;
+ constant PWREN_OPT : integer := 2;
+
+ constant RIGHT_OPT : integer := 3;
+ constant JMP_REG_OPT : integer := 3;
+ constant ST_OPT : integer := 3; -- store opt
+ constant RET_OPT : integer := 3;
+
+ constant NO_PSW_OPT : integer := 4;--no sharing
+ constant NO_DST_OPT : integer := 5; --no sharing
+
+ type op_info_t is (ADDSUB_OP,AND_OP,OR_OP, XOR_OP,SHIFT_OP, LDST_OP, JMP_OP, JMP_ST_OP, STACK_OP);
+ subtype op_opt_t is std_logic_vector(NUM_OP_OPT_WIDTH-1 downto 0);
+
+ type interrupt_t is (IDLE, UART);
+
+ constant UART_INT_EN_BIT : integer := 1;
+ constant GLOBAL_INT_EN_BIT : integer := 0;
+
+ constant UART_INT_VECTOR : std_logic_vector(PHYS_INSTR_ADDR_WIDTH-1 downto 0) := (0 => '1', others => '0');
+
+ type instruction_rec is record
+
+ predicates : std_logic_vector(3 downto 0);
+
+ opcode : opcode_t;
+
+ reg_dest_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
+ reg_src1_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
+ reg_src2_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
+
+ immediate : std_logic_vector(WORD_WIDTH-1 downto 0);
+
+ displacement : gp_register_t;
+
+ jmptype : std_logic_vector(1 downto 0);
+
+ high_low, fill, signext, bp, int: std_logic;
+
+ op_detail : op_opt_t;
+ op_group : op_info_t;
+
+ end record;
+
+
+
+ type read_through_write_rec is record
+
+ rtw_reg : gp_register_t;
+ rtw_reg1 : std_logic;
+ rtw_reg2 : std_logic;
+ immediate : gp_register_t;
+ imm_set : std_logic;
+ reg1_addr : gp_addr_t;
+ reg2_addr : gp_addr_t;
+
+ end record;
+
+ type dec_op is record
+ condition : condition_t;
+ op_group : op_info_t;
+ op_detail : op_opt_t;
+ brpr : std_logic;
+
+ displacement : gp_register_t;
+ prog_cnt : instr_addr_t;
+
+ src1 : gp_register_t;
+ src2 : gp_register_t;
+
+ saddr1 : gp_addr_t;
+ saddr2 : gp_addr_t;
+
+ daddr : gp_addr_t;
+
+ end record;
+
+ type writeback_rec is record
+-- result : in gp_register_t; --reg (alu result or jumpaddr)
+-- result_addr : in gp_addr_t; --reg
+ address : word_t; --ureg
+-- alu_jmp : in std_logic; --reg
+-- br_pred : in std_logic; --reg
+-- write_en : in std_logic; --reg (register file)
+ dmem_en : std_logic; --ureg (jump addr in mem or in address)
+ dmem_write_en : std_logic; --ureg
+ hword : std_logic; --ureg
+ byte_s : std_logic;
+ byte_en : byte_en_t;
+ data : gp_register_t;
+ end record;
+
+ type exec2wb_rec is record
+ result : gp_register_t; --reg (alu result or jumpaddr)
+ result_addr : gp_addr_t; --reg
+ address : word_t; --ureg
+ ram_data : word_t; --ureg
+ alu_jmp : std_logic; --reg
+ br_pred : std_logic; --reg
+ write_en : std_logic; --reg (register file) bei jump 1 wenn addr in result
+ dmem_en : std_logic; --ureg (jump addr in mem or in address)
+ dmem_write_en : std_logic; --ureg
+ hword : std_logic; --ureg
+ byte_s : std_logic; --ureg
+ end record;
+
+ function inc(value : in std_logic_vector; constant by : in integer := 1) return std_logic_vector;
+ function log2c(constant value : in integer range 0 to integer'high) return integer;