uses CONFIG_SANDPOINT_ALTIMUS
uses CONFIG_CBFS
uses CONFIG_ARCH_X86
uses CONFIG_SANDPOINT_TALUS
uses CONFIG_SANDPOINT_UNITY
uses CONFIG_SANDPOINT_VALIS
uses CONFIG_SANDPOINT_GYRUS
uses CONFIG_ISA_IO_BASE
uses CONFIG_ISA_MEM_BASE
uses CONFIG_PCIC0_CFGADDR
uses CONFIG_PCIC0_CFGDATA
uses CONFIG_PNP_CFGADDR
uses CONFIG_PNP_CFGDATA
uses CONFIG_IO_BASE

uses CONFIG_CROSS_COMPILE 
uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_SANDPOINT_ALTIMUS 
uses CONFIG_COMPRESS 
uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL 
uses CONFIG_USE_INIT
uses CONFIG_CHIP_CONFIGURE
uses CONFIG_NO_POST
uses CONFIG_CONSOLE_SERIAL8250 
uses CONFIG_TTYS0_BASE 
uses CONFIG_IDE
uses CONFIG_FS_PAYLOAD 
uses CONFIG_FS_EXT2
uses CONFIG_FS_ISO9660
uses CONFIG_FS_FAT
uses CONFIG_AUTOBOOT_CMDLINE
uses CONFIG_PAYLOAD_SIZE
uses CONFIG_ROM_SIZE
uses CONFIG_ROM_IMAGE_SIZE
uses CONFIG_RESET
uses CONFIG_EXCEPTION_VECTORS
uses CONFIG_ROMBASE
uses CONFIG_ROMSTART
uses CONFIG_RAMBASE
uses CONFIG_RAMSTART
uses CONFIG_STACK_SIZE
uses CONFIG_HEAP_SIZE

uses CONFIG_MAINBOARD
uses CONFIG_MAINBOARD_VENDOR
uses CONFIG_MAINBOARD_PART_NUMBER
uses COREBOOT_EXTRA_VERSION
uses CONFIG_CROSS_COMPILE
uses CC
uses CONFIG_HOSTCC
uses CONFIG_OBJCOPY

##
## Set memory map
##
default CONFIG_ISA_IO_BASE=0xfe000000
default CONFIG_ISA_MEM_BASE=0xfd000000
default CONFIG_PCIC0_CFGADDR=0xfec00000
default CONFIG_PCIC0_CFGDATA=0xfee00000
default CONFIG_PNP_CFGADDR=0x15c
default CONFIG_PNP_CFGDATA=0x15d
default CONFIG_IO_BASE=CONFIG_ISA_IO_BASE

##
## The default compiler
##
default CC="$(CONFIG_CROSS_COMPILE)gcc"
default CONFIG_HOSTCC="gcc"
## use a cross compiler
#default CONFIG_CROSS_COMPILE="powerpc-eabi-"
#default CONFIG_CROSS_COMPILE="ppc_74xx-"
default CONFIG_ARCH_X86=0

## Use stage 1 initialization code
default CONFIG_USE_INIT=1

## Use static configuration
default CONFIG_CHIP_CONFIGURE=1

## We don't use compressed image
default CONFIG_COMPRESS=0

## Turn off POST codes
default CONFIG_NO_POST=1

## Enable serial console
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
default CONFIG_CONSOLE_SERIAL8250=1
default CONFIG_TTYS0_BASE=0x3f8

## Load payload using filo
default CONFIG_IDE=1
default CONFIG_FS_PAYLOAD=1
default CONFIG_FS_EXT2=1
default CONFIG_FS_ISO9660=1
default CONFIG_FS_FAT=1
default CONFIG_AUTOBOOT_CMDLINE="hdc1:/vmlinuz"

# coreboot must fit into 128KB
default CONFIG_ROM_IMAGE_SIZE=131072
default CONFIG_ROM_SIZE={CONFIG_ROM_IMAGE_SIZE+CONFIG_PAYLOAD_SIZE}
default CONFIG_PAYLOAD_SIZE=262144

# Set stack and heap sizes (stage 2)
default CONFIG_STACK_SIZE=0x10000
default CONFIG_HEAP_SIZE=0x10000

# Sandpoint Demo Board
## Base of ROM
default CONFIG_ROMBASE=0xfff00000

## Sandpoint reset vector
default CONFIG_RESET=CONFIG_ROMBASE+0x100

## Exception vectors (other than reset vector)
default CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100

## Start of coreboot in the boot rom
## = CONFIG_RESET + exeception vector table size
default CONFIG_ROMSTART=CONFIG_RESET+0x3100

## Coreboot C code runs at this location in RAM
default CONFIG_RAMBASE=0x00100000
default CONFIG_RAMSTART=0x00100000

default CONFIG_SANDPOINT_ALTIMUS=1

### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=0
end