## ## This file is part of the coreboot project. ## ## Copyright (C) 2008 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## ## XIP_ROM_SIZE must be a power of 2. default XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end makerule ./failover.E depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end makerule ./failover.inc depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end makerule ./auto.E # depends "$(MAINBOARD)/auto.c option_table.h ../romcc" depends "$(MAINBOARD)/auto.c ../romcc" action "../romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc # depends "$(MAINBOARD)/auto.c option_table.h ../romcc" depends "$(MAINBOARD)/auto.c ../romcc" action "../romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds if USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else mainboardinit cpu/x86/32bit/reset32.inc ldscript /cpu/x86/32bit/reset32.lds end mainboardinit arch/i386/lib/cpu_reset.inc mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds if USE_FALLBACK_IMAGE ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end mainboardinit cpu/x86/fpu/enable_fpu.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc dir /pc80 config chip.h chip northbridge/amd/gx1 # Northbridge device pci_domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 on end # Ethernet device pci 12.0 on # ISA bridge chip superio/nsc/pc87351 # Super I/O device pnp 2e.0 off # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 end device pnp 2e.1 on # Parallel port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.2 on # COM2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.e on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.4 on # System wake-up control (SWC) irq 0x60 = 0x500 end device pnp 2e.5 on # PS/2 mouse irq 0x70 = 12 end device pnp 2e.6 on # PS/2 keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 end device pnp 2e.7 on # GPIO irq 0x60 = 0x800 end device pnp 2e.8 on # Fan speed control irq 0x60 = 0x900 end end end device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 on end # Audio device pci 12.4 on end # VGA device pci 13.0 on end # USB register "ide0_enable" = "1" register "ide1_enable" = "0" # No connector on this board end end chip cpu/amd/model_gx1 # CPU end end