#
# This file is part of the coreboot project.
#
# Copyright (C) 2011 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
#
 
ramstage-y += chip_name.c
driver-y += model_14_init.c

AGESA_ROOT = ../../../../vendorcode/amd/agesa

agesa_lib_src  = $(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSbLink.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib/GnbLib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14PerCorePciTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14BrandIdFt1.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbInitAtPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/F14IoCstate.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuIoCstate.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnprotoon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/F14MicrocodePatch05000025.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuInitEarlyTable.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Family/0x14/F14NbLclkNclkRatio.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Family/0x14/F14NbSmu.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieInitAtEnv.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieInitAtPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Feature/NbLclkDpm.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Feature/NbFuseTable.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Family/0x14/F14NbPowerGate.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Common/GnbLibFeatures.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14Pstate.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuC6State.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/F14C6State.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmMemRestore.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mm.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuCommonF14Utilities.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mttml.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mtrci3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/GnbInitAtReset.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnmcton.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuCacheInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mttdimbt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mtsdi3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mthdi.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/GnbInitAtEarly.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14PowerMgmtSystemTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mnfeat.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmStandardTraining.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/Fam14/htNbUtilitiesFam14.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuBist.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmParallelTraining.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/LVDDR3/mflvddr3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14PowerPlane.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mnreg.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnflowon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/CHINTLV/mfchi.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxInitAtMidPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14CacheDefaults.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Ps/ON/mpuon3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cahalt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/ON/F14OnMicrocodePatchTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PciePortInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mnflow.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuFeatureLeveling.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mttoptsrc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/PARTRN/mfParallelTraining.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxInitAtPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmEcc.c
agesa_lib_src += $(AGESA_ROOT)/Legacy/Proc/Dispatcher.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/MEMCLR/mfmemclr.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14WheaInitDataTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuDmi.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mttsrc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mnmct.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htInterfaceNonCoherent.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnidendimmon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuSrat.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdS3LateRestore.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Table.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14Utilities.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htInterface.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxStrapsInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbInitAtEarly.c
agesa_lib_src += $(AGESA_ROOT)/Lib/amdlib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuCacheFlushOnHalt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/minit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/GnbInitAtLate.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnoton.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/INTLVRN/mfintlvrn.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/IDENDIMM/mfidendimm.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmflow.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Ardk/ma.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/CommonInits.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuPstateLeveling.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mndcton.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxGmcInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuBrandId.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mnphy.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitEnv.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmConditionalPso.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/GnbInitAtPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/CommonReturns.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuPowerMgmt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitResume.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14PowerCheck.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14Dmi.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnregon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitEarly.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuFamilyTranslation.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuPostInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mn.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxInitAtEnvPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuHwC1e.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuLateInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/CreateStruct.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuWhea.c
agesa_lib_src += $(AGESA_ROOT)/Lib/helper.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/CSINTLV/mfcsi.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/ECC/mfecc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/DMI/mfDMI.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Ps/ON/mpson3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdLateRunApTask.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuPowerMgmtMultiSocket.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmUmaAlloc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuPstateTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14PciTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuPowerMgmtSingleSocket.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/GnbInitAtMid.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mt3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmExcludeDimm.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieInitAtEarlyPost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htInterfaceGeneral.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/S3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuFeatures.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Ps/mp.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mdef.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mtthrc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuGeneralServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htNb.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuSlit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/ECC/mfemp.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbInitAtLatePost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmNodeInterleave.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/Fam14/htNbFam14.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxConfigData.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/ON/mmflowon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitReset.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14MsrTables.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieInitAtLatePost.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mttEdgeDetect.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxRegisterAcc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitLate.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htFeat.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbInitAtReset.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/ON/F14OnLogicalIdTables.c
agesa_lib_src += $(AGESA_ROOT)/Legacy/Proc/hobTransfer.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuApicUtilities.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/GnbInitAtEnv.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuEventLog.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htInterfaceCoherent.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/muc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmLvDdr3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuMicrocodePatch.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/mttecc.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14SoftwareThermal.c
agesa_lib_src += $(AGESA_ROOT)/Legacy/Proc/agesaCallouts.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/PARTRN/mfStandardTraining.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mndct.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmOnlineSpare.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuEarlyInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnphyon.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/merrhdl.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdS3Save.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mtspd3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Family/0x14/cpuF14BrandId.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htMain.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/cpuWarmReset.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbConfigData.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mttwl3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/Feature/cpuPstateGather.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mtot3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mmMemClr.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Ardk/ON/mauon3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/TABLE/mftds.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Ardk/ON/mason3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Feat/S3/mfs3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htNotify.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mnS3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/CPU/heapManager.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Tech/DDR3/mttecc3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/ON/mnS3on.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/AmdInitMid.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/NB/mntrain3.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/Family/0x14/F14GfxServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/S3SaveState.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Common/S3RestoreState.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieLateInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PciePortLateInit.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/PCIe/PcieMiscLib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbSmuLib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbInitAtEnv.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/Family/0x14/F14NbServices.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Gfx/GfxLib.c
agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Nb/NbPowerMgmt.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Recovery/HT/htInitReset.c
agesa_lib_src += $(AGESA_ROOT)/Proc/Mem/Main/mu.c

romstage-y += $(agesa_lib_src)
ramstage-y += $(agesa_lib_src)

subdirs-y += ../../mtrr
subdirs-y += ../../../x86/tsc
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
subdirs-y += ../../../x86/smm

ramstage-y += apic_timer.c
cpu_incs += $(src)/cpu/amd/agesa_wrapper/family14/cache_as_ram.inc