#define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
		MonoInst *inst; \
		MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_REG); \
		inst->inst_basereg = basereg; \
		inst->inst_offset = offset; \
		inst->sreg2 = operand; \
		mono_bblock_add_inst (cfg->cbb, inst); \
	} while (0)

#define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
		MonoInst *inst; \
		MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_IMM); \
		inst->inst_basereg = basereg; \
		inst->inst_offset = offset; \
		inst->inst_imm = operand; \
		mono_bblock_add_inst (cfg->cbb, inst); \
	} while (0)

/* override the arch independant versions with fast x86 versions */

#undef MONO_EMIT_BOUNDS_CHECK
#undef MONO_EMIT_BOUNDS_CHECK_IMM

#define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
		if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
			MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
			MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
		} \
	} while (0)

#define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
		if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
			MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
			MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
		} \
	} while (0)

%%

#
# inssel-x86.brg: burg file for special x86 instructions
#
# Author:
#   Dietmar Maurer (dietmar@ximian.com)
#   Paolo Molaro (lupus@ximian.com)
#
# (C) 2002 Ximian, Inc.
#

stmt: OP_START_HANDLER,
stmt: OP_ENDFINALLY,
stmt: OP_ENDFILTER (reg) {
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
	/* this should only happen for methods returning a long */
	MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
	MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
}

reg: CEE_LDIND_I1 (OP_REGVAR) {
	MONO_EMIT_UNALU (s, tree, OP_SEXT_I1, state->reg1, state->left->tree->dreg);}

reg: CEE_LDIND_I2 (OP_REGVAR) {
	MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);}

lreg: OP_LNEG (lreg) "3" {
	int tmpr = mono_regstate_next_int (s->rs);
	MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
	MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
	MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
}

freg: OP_LCONV_TO_R8 (lreg) {
	MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
	MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
	tree->opcode = OP_X86_FP_LOAD_I8;
	tree->inst_basereg = X86_ESP;
	tree->inst_offset = 0;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
	MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}

freg: OP_LCONV_TO_R4 (lreg) {
	MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
	MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
	tree->opcode = OP_X86_FP_LOAD_I8;
	tree->inst_basereg = X86_ESP;
	tree->inst_offset = 0;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
	/* change precision */
	MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
	MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
	MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}

freg: CEE_CONV_R_UN (reg) {
	MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
	MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
	tree->opcode = OP_X86_FP_LOAD_I8;
	tree->inst_basereg = X86_ESP;
	tree->inst_offset = 0;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
	MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}

cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
	tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	tree->sreg2 = state->right->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
	tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	tree->sreg2 = state->right->left->tree->dreg;
	mono_bblock_add_inst (s->cbb, tree);
}

cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
	tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	tree->inst_imm = state->right->tree->inst_c0;
	mono_bblock_add_inst (s->cbb, tree);
}


cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
	tree->opcode = OP_X86_COMPARE_MEM_IMM;
	tree->inst_offset = state->left->left->tree->inst_c0;
	tree->inst_imm = state->right->tree->inst_c0;
	mono_bblock_add_inst (s->cbb, tree);
}

cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
	tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
	tree->sreg2 = state->right->left->tree->inst_basereg;
	tree->inst_offset = state->right->left->tree->inst_offset;
	tree->sreg1 = state->left->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
	tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
	tree->sreg2 = state->right->left->tree->inst_basereg;
	tree->inst_offset = state->right->left->tree->inst_offset;
	tree->sreg1 = state->left->left->tree->dreg;
	mono_bblock_add_inst (s->cbb, tree);
}

cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
	tree->opcode = OP_CNE;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
} cost {
	MBCOND (!state->left->right->tree->inst_c0);
	return 1;
}

stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
	tree->opcode = OP_X86_SETNE_MEMBASE;
	tree->inst_offset = state->left->tree->inst_offset;
	tree->inst_basereg = state->left->tree->inst_basereg;
	mono_bblock_add_inst (s->cbb, tree);
} cost {
	MBCOND (!state->right->left->right->tree->inst_c0);
	return 1;
}

stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
	tree->opcode = OP_X86_SETEQ_MEMBASE;
	tree->inst_offset = state->left->tree->inst_offset;
	tree->inst_basereg = state->left->tree->inst_basereg;
	mono_bblock_add_inst (s->cbb, tree);
}

reg: OP_LOCALLOC (OP_ICONST) {
	if (tree->flags & MONO_INST_INIT) {
		/* microcoded in mini-x86.c */
		tree->sreg1 = mono_regstate_next_int (s->rs);
		tree->dreg = state->reg1;
		MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
		mono_bblock_add_inst (s->cbb, tree);
	} else {
		guint32 size = state->left->tree->inst_c0;
		size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
		MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
		MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
	}
}

reg: OP_LOCALLOC (reg) {
	tree->sreg1 = state->left->tree->dreg;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_SETRET (reg) {
	MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
}

stmt: OP_SETRET (lreg) {
	MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
	MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
}

stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
	MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
}

stmt: OP_SETRET (freg) {
	/* nothing to do */
}

stmt: OP_SETRET (OP_ICONST) {
	tree->opcode = OP_ICONST;
	tree->inst_c0 = state->left->tree->inst_c0;
	tree->dreg = X86_EAX;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_SETRET (i8con) {
	MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
	MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
}

stmt: OP_OUTARG (reg) {
	tree->opcode = OP_X86_PUSH;
	tree->sreg1 = state->left->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
	tree->opcode = OP_X86_PUSH;
	tree->sreg1 = state->left->left->tree->dreg;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
	MonoInst *ins;
	ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
	ins->opcode = OP_X86_PUSH_GOT_ENTRY;
	ins->inst_right = state->left->right->tree;
	ins->inst_basereg = state->left->left->left->tree->dreg;
	mono_bblock_add_inst (s->cbb, ins);
}

stmt: OP_OUTARG (lreg) {
	MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
	tree->opcode = OP_X86_PUSH;
	tree->sreg1 = state->left->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
	MonoInst *ins;
	ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
	ins->opcode = OP_X86_PUSH_MEMBASE;
	ins->inst_basereg = state->left->left->tree->inst_basereg;
	ins->inst_offset = state->left->left->tree->inst_offset + 4;
	mono_bblock_add_inst (s->cbb, ins);

	tree->opcode = OP_X86_PUSH_MEMBASE;
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (OP_ICONST) {
	tree->opcode = OP_X86_PUSH_IMM;
	tree->inst_imm = state->left->tree->inst_c0;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (i8con) {
	MonoInst *ins;
	ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
	ins->opcode = OP_X86_PUSH_IMM;
	ins->inst_imm = state->left->tree->inst_ms_word;
	mono_bblock_add_inst (s->cbb, ins);

	tree->opcode = OP_X86_PUSH_IMM;
	tree->inst_imm = state->left->tree->inst_ls_word;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
stmt: OP_OUTARG (CEE_LDIND_I (base)),
stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
	tree->opcode = OP_X86_PUSH_MEMBASE;
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG (freg) {
	MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
	tree->opcode = OP_STORER8_MEMBASE_REG;
	tree->sreg1 = state->left->reg1;
	tree->inst_destbasereg = X86_ESP;
	tree->inst_offset = 0;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG_R4 (freg) {
	MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
	tree->opcode = OP_STORER4_MEMBASE_REG;
	tree->sreg1 = state->left->reg1;
	tree->inst_destbasereg = X86_ESP;
	tree->inst_offset = 0;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG_R8 (freg) {
	int esp_displ = (tree->backend.arg_info >> 16) & 0xffff;
	int esp_offset = tree->backend.arg_info & 0xffff;
	if (esp_displ)
		MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, esp_displ);
	tree->opcode = OP_STORER8_MEMBASE_REG;
	tree->sreg1 = state->left->reg1;
	tree->inst_destbasereg = X86_ESP;
	tree->inst_offset = esp_offset;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
	MonoInst *vt = state->left->left->tree;
	//g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);

	if (!tree->inst_imm)
		return;

	if (tree->inst_imm <= 4) {
		tree->opcode = OP_X86_PUSH_MEMBASE;
		tree->inst_basereg = vt->inst_basereg;
		tree->inst_offset = vt->inst_offset;
		mono_bblock_add_inst (s->cbb, tree);
	} else if (tree->inst_imm <= 20) {
		int sz = tree->inst_imm;
		sz += 3;
		sz &= ~3;
		MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
		mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
	} else {
		tree->opcode = OP_X86_PUSH_OBJ;
		tree->inst_basereg = vt->inst_basereg;
		tree->inst_offset = vt->inst_offset;
		mono_bblock_add_inst (s->cbb, tree);
	}
}

stmt: OP_OUTARG_VT (OP_ICONST) {
	tree->opcode = OP_X86_PUSH_IMM;
	tree->inst_imm = state->left->tree->inst_c0;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_OUTARG_VT (reg) {
	tree->opcode = OP_X86_PUSH;
	tree->sreg1 = state->left->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_X86_OUTARG_ALIGN_STACK {
	MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, tree->inst_c0);
}	

reg: OP_LDADDR (OP_REGOFFSET),
reg: CEE_LDOBJ (OP_REGOFFSET) {
	if (state->left->tree->inst_offset) {
		tree->opcode = OP_X86_LEA_MEMBASE;
		tree->inst_imm = state->left->tree->inst_offset;
	} else
		tree->opcode = OP_MOVE;
	
	tree->sreg1 = state->left->tree->inst_basereg;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

reg: CEE_LDELEMA (reg, reg) "15" {
	guint32 size = mono_class_array_element_size (tree->klass);
	
	MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);

	if (size == 1 || size == 2 || size == 4 || size == 8) {
		static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
		tree->opcode = OP_X86_LEA;
		tree->dreg = state->reg1;
		tree->sreg1 = state->left->reg1;
		tree->sreg2 = state->right->reg1;
		tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
		tree->backend.shift_amount = fast_log2 [size];
		mono_bblock_add_inst (s->cbb, tree);
	} else {
		int mult_reg = mono_regstate_next_int (s->rs);
		int add_reg = mono_regstate_next_int (s->rs);
		MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
		MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
		MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
	}
}

stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
	/* nothing to do: the value is already on the FP stack */
}

stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_U4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_U4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_U4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_U4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_U4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_I4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_I4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_I4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
	int con = state->right->right->tree->inst_c0;	
	MBTREE_TYPE *t1 = state->left->tree;
	MBTREE_TYPE *t2 = state->right->left->left->tree;
	int op = state->right->tree->opcode;

	/* inst_basereg/offset can't be used for base
	 * operands in cost functions, since they are not set yet,
	 * so we catch all the cases and handle them here.
	 */
	if (t1->inst_basereg == t2->inst_basereg && t1->inst_offset == t2->inst_offset) {
		if (con == 1 && op == CEE_ADD) {
			tree->opcode = OP_X86_INC_MEMBASE;
		} else if (con == 1 && op == CEE_SUB) {
			tree->opcode = OP_X86_DEC_MEMBASE;
		} else {
			tree->opcode = alu_reg_to_alu_membase_imm (op);
			tree->inst_imm = con;
		}

		tree->inst_basereg = state->left->tree->inst_basereg;
		tree->inst_offset = state->left->tree->inst_offset;
		mono_bblock_add_inst (s->cbb, tree);
	} else {
		/* emit by hand */
		int loaded_reg = mono_regstate_next_int (s->rs);
		int add_reg = mono_regstate_next_int (s->rs);
		MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADI4_MEMBASE, loaded_reg, t2->inst_basereg, t2->inst_offset);
		MONO_EMIT_NEW_BIALU_IMM (s, alu_reg_to_alu_imm (op), add_reg, loaded_reg, con);
		MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STOREI4_MEMBASE_REG, t1->inst_basereg, t1->inst_offset, add_reg);
	}
}

#
# this rules is incorrect, it needs to do an indirect inc (inc_membase)
#stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
#	tree->opcode = OP_X86_INC_REG;
#	tree->dreg = state->left->reg1;
#	mono_bblock_add_inst (s->cbb, tree);
#} cost {
#	MBState *s1 = state->left;
#	MBState *s2 = state->right->left;
#	int con = state->right->right->tree->inst_c0;	
#	MBCOND (con == 1 && s1->reg1 == s2->reg1);
#	return 1;
#}

stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
	int con = state->right->right->tree->inst_c0;	
	int dreg = state->left->tree->dreg;
	int sreg = state->right->left->left->tree->dreg;

	if (con == 1) {
		if (dreg != sreg)
			MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
		tree->opcode = OP_X86_DEC_REG;
		tree->dreg = tree->sreg1 = dreg;
	} else if (con == -1) {
		if (dreg != sreg)
			MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
		tree->opcode = OP_X86_INC_REG;
		tree->dreg = tree->sreg1 = dreg;
	} else {
		tree->opcode = OP_SUB_IMM;
		tree->inst_imm = con;
		tree->sreg1 = sreg;
		tree->dreg = dreg;
	}
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
	int con = state->right->right->tree->inst_c0;
	int dreg = state->left->tree->dreg;
	int sreg = state->right->left->left->tree->dreg;

	if (con == 1) {
		if (dreg != sreg)
			MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
		tree->opcode = OP_X86_INC_REG;
		tree->dreg = tree->sreg1 = dreg;
	} else if (con == -1) {
		if (dreg != sreg)
			MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
		tree->opcode = OP_X86_DEC_REG;
		tree->dreg = tree->sreg1 = dreg;
	} else {
		tree->opcode = OP_ADD_IMM;
		tree->inst_imm = con;
		tree->sreg1 = sreg;
		tree->dreg = dreg;
	}
	mono_bblock_add_inst (s->cbb, tree);
}

reg: CEE_LDIND_I2 (OP_REGVAR) {
	MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
}

# The XOR rule
stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
	int r = state->left->tree->dreg;
	MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
} cost {
	MBCOND (!state->right->tree->inst_c0);
	
	return 0;
}

# on x86, fp compare overwrites EAX, so we must
# either improve the local register allocator or
# emit coarse opcodes which saves EAX for us.

reg: OP_CEQ (OP_COMPARE (freg, freg)) {	
	MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
			 state->left->right->reg1);
}

reg: OP_CLT (OP_COMPARE (freg, freg)) {	
	MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
			 state->left->right->reg1);
}

reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {	
	MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
			 state->left->right->reg1);
}

reg: OP_CGT (OP_COMPARE (freg, freg)) {	
	MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
			 state->left->right->reg1);
}

reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {	
	MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
			 state->left->right->reg1);
}

# fpcflags overwrites EAX, but this does not matter for statements
# because we are the last operation in the tree.
 
stmt: CEE_BNE_UN (fpcflags) {
	tree->opcode = OP_FBNE_UN;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BEQ (fpcflags) {
	tree->opcode = OP_FBEQ;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BLT (fpcflags) {
	tree->opcode = OP_FBLT;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BLT_UN (fpcflags) {
	tree->opcode = OP_FBLT_UN;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BGT (fpcflags) {
	tree->opcode = OP_FBGT;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BGT_UN (fpcflags) {
	tree->opcode = OP_FBGT_UN;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BGE  (fpcflags) {
	tree->opcode = OP_FBGE;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BGE_UN (fpcflags) {
	tree->opcode = OP_FBGE_UN;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BLE  (fpcflags) {
	tree->opcode = OP_FBLE;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_BLE_UN (fpcflags) {
	tree->opcode = OP_FBLE_UN;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: CEE_POP (freg) "0" {
	/* we need to pop the value from the x86 FP stack */
	MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);	
}     

# override the rules in inssel-float.brg that work for machines with FP registers 

freg: OP_FCONV_TO_R8 (freg) "0" {
	/* nothing to do */
}

freg: OP_FCONV_TO_R4 (freg) "0" {
	/* fixme: nothing to do ??*/
}

reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
	MonoInst *base = state->right->left->tree;

	tree->dreg = state->reg1;
	tree->sreg1 = state->left->reg1;
	tree->sreg2 = base->inst_basereg; 
	tree->inst_offset = base->inst_offset; 
	tree->opcode = OP_X86_ADD_REG_MEMBASE; 
	mono_bblock_add_inst (s->cbb, tree);
} 

reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
	MonoInst *base = state->right->left->tree;

	tree->dreg = state->reg1;
	tree->sreg1 = state->left->reg1;
	tree->sreg2 = base->inst_basereg; 
	tree->inst_offset = base->inst_offset; 
	tree->opcode = OP_X86_SUB_REG_MEMBASE; 
	mono_bblock_add_inst (s->cbb, tree);
} 

reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
	MonoInst *base = state->right->left->tree;

	tree->dreg = state->reg1;
	tree->sreg1 = state->left->reg1;
	tree->sreg2 = base->inst_basereg; 
	tree->inst_offset = base->inst_offset; 
	tree->opcode = OP_X86_MUL_REG_MEMBASE; 
	mono_bblock_add_inst (s->cbb, tree);
} 

reg: OP_IMIN (reg, reg),
reg: OP_IMAX (reg, reg) {
	MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
}

lreg: OP_LSHL (lreg, reg) "0" {
	MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
}

lreg: OP_LSHL (lreg, OP_ICONST) "0" {
	MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
}

lreg: OP_LSHR (lreg, reg) "0" {
	MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
}

lreg: OP_LSHR (lreg, OP_ICONST) "0" {
	MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
}

lreg: OP_LSHR_UN (lreg, reg) "0" {
	MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
}

lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
	MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
}

reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
reg: OP_ATOMIC_ADD_I4 (base, reg),
reg: OP_ATOMIC_EXCHANGE_I4 (base, reg),
reg: OP_ATOMIC_CAS_IMM_I4 (base, reg) {
	tree->opcode = tree->opcode;
	tree->dreg = state->reg1;
	tree->sreg2 = state->right->reg1;
	tree->inst_basereg = state->left->tree->inst_basereg; 
	tree->inst_offset = state->left->tree->inst_offset; 
    
	mono_bblock_add_inst (s->cbb, tree);
}

# Optimized call instructions
reg: OP_CALL_REG (CEE_LDIND_I (base)),
freg: OP_FCALL_REG (CEE_LDIND_I (base)) {
	tree->opcode = call_reg_to_call_membase (tree->opcode);
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

lreg: OP_LCALL_REG (CEE_LDIND_I (base)) {
	tree->opcode = call_reg_to_call_membase (tree->opcode);
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
	tree->opcode = call_reg_to_call_membase (tree->opcode);
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	mono_bblock_add_inst (s->cbb, tree);
}

stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
	mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
	
	tree->opcode = call_reg_to_call_membase (tree->opcode);
	tree->inst_basereg = state->left->left->tree->inst_basereg;
	tree->inst_offset = state->left->left->tree->inst_offset;
	tree->dreg = state->reg1;
	mono_bblock_add_inst (s->cbb, tree);
}

# Optimized ldind(reg) rules
reg: CEE_LDIND_REF (OP_REGVAR),
reg: CEE_LDIND_I (OP_REGVAR),
reg: CEE_LDIND_I4 (OP_REGVAR),
reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
	state->reg1 = state->left->tree->dreg;
	tree->dreg = state->reg1;
}

reg: OP_STR_CHAR_ADDR (reg, reg) "2" {
	/*
	 * The corlib functions check for oob already.
	 * MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoString, length, state->right->reg1);
	 */
	tree->opcode = OP_X86_LEA;
	tree->dreg = state->reg1;
	tree->sreg1 = state->left->reg1;
	tree->sreg2 = state->right->reg1;
	tree->inst_imm = G_STRUCT_OFFSET (MonoString, chars);
	tree->backend.shift_amount = 1; /* shift by two */
	mono_bblock_add_inst (s->cbb, tree);
}

%%

static int
alu_reg_to_alu_imm (int op)
{
	switch (op) {
	case CEE_ADD:
		return OP_ADD_IMM;
	case CEE_SUB:
		return OP_SUB_IMM;
	case CEE_AND:
		return OP_AND_IMM;
	case CEE_OR:
		return OP_OR_IMM;
	case CEE_XOR:
		return OP_XOR_IMM;
	default:
		g_assert_not_reached ();
	}
	return -1;
}

static int
alu_reg_to_alu_membase_imm (int op)
{
	switch (op) {
	case CEE_ADD:
		return OP_X86_ADD_MEMBASE_IMM;
	case CEE_SUB:
		return OP_X86_SUB_MEMBASE_IMM;
	case CEE_AND:
		return OP_X86_AND_MEMBASE_IMM;
	case CEE_OR:
		return OP_X86_OR_MEMBASE_IMM;
	case CEE_XOR:
		return OP_X86_XOR_MEMBASE_IMM;
	default:
		g_assert_not_reached ();
	}
	return -1;
}

static int
call_reg_to_call_membase (int opcode)
{
	switch (opcode) {
	case OP_CALL_REG:
		return OP_CALL_MEMBASE;
	case OP_FCALL_REG:
		return OP_FCALL_MEMBASE;
	case OP_VCALL_REG:
		return OP_VCALL_MEMBASE;
	case OP_LCALL_REG:
		return OP_LCALL_MEMBASE;
	case OP_VOIDCALL_REG:
		return OP_VOIDCALL_MEMBASE;
	default:
		g_assert_not_reached ();
	}

	return -1;
}