/* PSR := Rn, (imm8 ROR 2*rot) */ #define ARM__REG_IMM_COND(p, rn, imm8, rot, cond) \ ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_, 0, rn, imm8, rot, cond) #define ARM__REG_IMM(p, rn, imm8, rot) \ ARM__REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL) #ifndef ARM_NOIASM #define __REG_IMM_COND(rn, imm8, rot, cond) \ ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_, 0, rn, imm8, rot, cond) #define __REG_IMM(rn, imm8, rot) \ __REG_IMM_COND(rn, imm8, rot, ARMCOND_AL) #endif /* PSR := Rn, imm8 */ #define ARM__REG_IMM8_COND(p, rn, imm8, cond) \ ARM__REG_IMM_COND(p, rn, imm8, 0, cond) #define ARM__REG_IMM8(p, rn, imm8) \ ARM__REG_IMM8_COND(p, rn, imm8, ARMCOND_AL) #ifndef ARM_NOIASM #define __REG_IMM8_COND(rn, imm8, cond) \ __REG_IMM_COND(rn, imm8, 0, cond) #define __REG_IMM8(rn, imm8) \ __REG_IMM8_COND(rn, imm8, ARMCOND_AL) #endif /* PSR := Rn, Rm */ #define ARM__REG_REG_COND(p, rn, rm, cond) \ ARM_DPIOP_S_REG_REG_COND(p, ARMOP_, 0, rn, rm, cond) #define ARM__REG_REG(p, rn, rm) \ ARM__REG_REG_COND(p, rn, rm, ARMCOND_AL) #ifndef ARM_NOIASM #define __REG_REG_COND(rn, rm, cond) \ ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_, 0, rn, rm, cond) #define __REG_REG(rn, rm) \ __REG_REG_COND(rn, rm, ARMCOND_AL) #endif /* PSR := Rn, (Rm imm8) */ #define ARM__REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \ ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_, 0, rn, rm, shift_type, imm_shift, cond) #define ARM__REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \ ARM__REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL) #ifndef ARM_NOIASM #define __REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \ ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_, 0, rn, rm, shift_type, imm_shift, cond) #define __REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \ __REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL) #endif