1 // VGA bios implementation
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
10 // * review correctness of converted asm by comparing with RBIL
11 // * refactor redundant code into sub-functions
12 // * See if there is a method to the in/out stuff that can be encapsulated.
13 // * remove "biosfn" prefixes
14 // * verify all funcs static
16 // * convert vbe/clext code
18 #include "bregs.h" // struct bregs
19 #include "biosvar.h" // GET_BDA
20 #include "util.h" // memset
21 #include "vgatables.h" // find_vga_entry
25 #define CONFIG_CIRRUS 0
28 #define DEBUG_VGA_POST 1
29 #define DEBUG_VGA_10 3
31 #define SET_VGA(var, val) SET_FARVAR(get_global_seg(), (var), (val))
34 call16_vgaint(u32 eax, u32 ebx)
46 biosfn_perform_gray_scale_summing(u16 start, u16 count)
48 vgahw_screen_disable();
50 for (i = start; i < start+count; i++) {
52 vgahw_get_dac_regs(GET_SEG(SS), rgb, i, 1);
54 // intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
55 u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
59 vgahw_set_dac_regs(GET_SEG(SS), rgb, i, 1);
61 vgahw_screen_enable();
65 biosfn_set_cursor_shape(u8 CH, u8 CL)
70 u16 curs = (CH << 8) + CL;
71 SET_BDA(cursor_type, curs);
73 u8 modeset_ctl = GET_BDA(modeset_ctl);
74 u16 cheight = GET_BDA(char_height);
75 if ((modeset_ctl & 0x01) && (cheight > 8) && (CL < 8) && (CH < 0x20)) {
77 CH = ((CH + 1) * cheight / 8) - 1;
79 CH = ((CL + 1) * cheight / 8) - 2;
80 CL = ((CL + 1) * cheight / 8) - 1;
82 vgahw_set_cursor_shape(CH, CL);
86 biosfn_get_cursor_shape(u8 page)
90 // FIXME should handle VGA 14/16 lines
91 return GET_BDA(cursor_type);
95 set_cursor_pos(struct cursorpos cp)
97 // Should not happen...
102 SET_BDA(cursor_pos[cp.page], (cp.y << 8) | cp.x);
104 // Set the hardware cursor
105 u8 current = GET_BDA(video_page);
106 if (cp.page != current)
109 // Get the dimensions
110 u16 nbcols = GET_BDA(video_cols);
111 u16 nbrows = GET_BDA(video_rows) + 1;
113 // Calculate the address knowing nbcols nbrows and page num
114 u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
115 + cp.x + cp.y * nbcols);
117 vgahw_set_cursor_pos(address);
120 static struct cursorpos
121 get_cursor_pos(u8 page)
124 // special case - use current page
125 page = GET_BDA(video_page);
127 struct cursorpos cp = { 0, 0, 0xfe };
130 // FIXME should handle VGA 14/16 lines
131 u16 xy = GET_BDA(cursor_pos[page]);
132 struct cursorpos cp = {xy, xy>>8, page};
137 biosfn_set_active_page(u8 page)
143 struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
147 // Get pos curs pos for the right page
148 struct cursorpos cp = get_cursor_pos(page);
151 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
152 // Get the dimensions
153 u16 nbcols = GET_BDA(video_cols);
154 u16 nbrows = GET_BDA(video_rows) + 1;
156 // Calculate the address knowing nbcols nbrows and page num
157 address = SCREEN_MEM_START(nbcols, nbrows, page);
158 SET_BDA(video_pagestart, address);
161 address = SCREEN_IO_START(nbcols, nbrows, page);
163 struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
164 address = page * GET_GLOBAL(vparam_g->slength);
167 vgahw_set_active_page(address);
169 // And change the BIOS page
170 SET_BDA(video_page, page);
172 dprintf(1, "Set active page %02x address %04x\n", page, address);
174 // Display the cursor, now the page is active
178 static struct cursorpos
179 check_scroll(struct cursorpos cp)
181 // Get the dimensions
182 u16 nbrows = GET_BDA(video_rows) + 1;
183 u16 nbcols = GET_BDA(video_cols);
185 // Do we need to wrap ?
186 if (cp.x == nbcols) {
190 // Do we need to scroll ?
191 if (cp.y == nbrows) {
192 struct cursorpos ul = {0, 0, cp.page};
193 struct cursorpos lr = {nbcols-1, nbrows-1, cp.page};
194 vgafb_scroll(1, -1, ul, lr);
201 static struct cursorpos
202 write_teletype(struct cursorpos cp, struct carattr ca)
224 struct carattr dummyca = {' ', ca.attr, ca.use_attr};
225 vgafb_write_char(cp, dummyca);
227 cp = check_scroll(cp);
232 vgafb_write_char(cp, ca);
236 return check_scroll(cp);
240 write_string(struct cursorpos cp, u8 flag, u8 attr, u16 count,
241 u16 seg, u8 *offset_far)
243 // if row=0xff special case : use current cursor position
245 cp = get_cursor_pos(cp.page);
247 while (count-- != 0) {
248 u8 car = GET_FARVAR(seg, *offset_far);
250 if ((flag & 0x02) != 0) {
251 attr = GET_FARVAR(seg, *offset_far);
255 struct carattr ca = {car, attr, 1};
256 cp = write_teletype(cp, ca);
264 set_scan_lines(u8 lines)
266 vgahw_set_scan_lines(lines);
268 biosfn_set_cursor_shape(0x06, 0x07);
270 biosfn_set_cursor_shape(lines - 4, lines - 3);
271 SET_BDA(char_height, lines);
272 u16 vde = vgahw_get_vde();
273 u8 rows = vde / lines;
274 SET_BDA(video_rows, rows - 1);
275 u16 cols = GET_BDA(video_cols);
276 SET_BDA(video_pagesize, rows * cols * 2);
280 biosfn_save_bda_state(u16 seg, struct saveBDAstate *info)
282 SET_FARVAR(seg, info->video_mode, GET_BDA(video_mode));
283 SET_FARVAR(seg, info->video_cols, GET_BDA(video_cols));
284 SET_FARVAR(seg, info->video_pagesize, GET_BDA(video_pagesize));
285 SET_FARVAR(seg, info->crtc_address, GET_BDA(crtc_address));
286 SET_FARVAR(seg, info->video_rows, GET_BDA(video_rows));
287 SET_FARVAR(seg, info->char_height, GET_BDA(char_height));
288 SET_FARVAR(seg, info->video_ctl, GET_BDA(video_ctl));
289 SET_FARVAR(seg, info->video_switches, GET_BDA(video_switches));
290 SET_FARVAR(seg, info->modeset_ctl, GET_BDA(modeset_ctl));
291 SET_FARVAR(seg, info->cursor_type, GET_BDA(cursor_type));
294 SET_FARVAR(seg, info->cursor_pos[i], GET_BDA(cursor_pos[i]));
295 SET_FARVAR(seg, info->video_pagestart, GET_BDA(video_pagestart));
296 SET_FARVAR(seg, info->video_page, GET_BDA(video_page));
298 SET_FARVAR(seg, *(u32*)&info->font0_off, GET_IVT(0x1f).segoff);
299 SET_FARVAR(seg, *(u32*)&info->font1_off, GET_IVT(0x43).segoff);
303 biosfn_restore_bda_state(u16 seg, struct saveBDAstate *info)
305 SET_BDA(video_mode, GET_FARVAR(seg, info->video_mode));
306 SET_BDA(video_cols, GET_FARVAR(seg, info->video_cols));
307 SET_BDA(video_pagesize, GET_FARVAR(seg, info->video_pagesize));
308 SET_BDA(crtc_address, GET_FARVAR(seg, info->crtc_address));
309 SET_BDA(video_rows, GET_FARVAR(seg, info->video_rows));
310 SET_BDA(char_height, GET_FARVAR(seg, info->char_height));
311 SET_BDA(video_ctl, GET_FARVAR(seg, info->video_ctl));
312 SET_BDA(video_switches, GET_FARVAR(seg, info->video_switches));
313 SET_BDA(modeset_ctl, GET_FARVAR(seg, info->modeset_ctl));
314 SET_BDA(cursor_type, GET_FARVAR(seg, info->cursor_type));
316 for (i = 0; i < 8; i++)
317 SET_BDA(cursor_pos[i], GET_FARVAR(seg, info->cursor_pos[i]));
318 SET_BDA(video_pagestart, GET_FARVAR(seg, info->video_pagestart));
319 SET_BDA(video_page, GET_FARVAR(seg, info->video_page));
321 SET_IVT(0x1f, GET_FARVAR(seg, info->font0_seg)
322 , GET_FARVAR(seg, info->font0_off));
323 SET_IVT(0x43, GET_FARVAR(seg, info->font1_seg)
324 , GET_FARVAR(seg, info->font1_off));
328 /****************************************************************
330 ****************************************************************/
334 handle_1000(struct bregs *regs)
336 u8 noclearmem = regs->al & 0x80;
337 u8 mode = regs->al & 0x7f;
348 cirrus_set_video_mode(mode);
351 if (vbe_has_vbe_display())
352 dispi_set_enable(VBE_DISPI_DISABLED);
354 // find the entry in the video modes
355 struct vgamode_s *vmode_g = find_vga_entry(mode);
356 dprintf(1, "mode search %02x found %p\n", mode, vmode_g);
360 // Read the bios mode set control
361 u8 modeset_ctl = GET_BDA(modeset_ctl);
363 // Then we know the number of lines
366 // if palette loading (bit 3 of modeset ctl = 0)
367 if ((modeset_ctl & 0x08) == 0) { // Set the PEL mask
368 vgahw_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
370 // From which palette
371 u8 *palette_g = GET_GLOBAL(vmode_g->dac);
372 u16 palsize = GET_GLOBAL(vmode_g->dacsize) / 3;
374 // Always 256*3 values
375 vgahw_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
377 for (i = palsize; i < 0x0100; i++) {
378 static u8 rgb[3] VAR16;
379 vgahw_set_dac_regs(get_global_seg(), rgb, i, 1);
382 if ((modeset_ctl & 0x02) == 0x02)
383 biosfn_perform_gray_scale_summing(0x00, 0x100);
386 struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
387 vgahw_set_mode(vparam_g);
389 if (noclearmem == 0x00)
390 clear_screen(vmode_g);
392 // Set CRTC address VGA or MDA
393 u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
394 if (GET_GLOBAL(vmode_g->memmodel) == MTEXT)
395 crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
398 u16 cheight = GET_GLOBAL(vparam_g->cheight);
399 SET_BDA(video_mode, mode);
400 SET_BDA(video_cols, GET_GLOBAL(vparam_g->twidth));
401 SET_BDA(video_pagesize, GET_GLOBAL(vparam_g->slength));
402 SET_BDA(crtc_address, crtc_addr);
403 SET_BDA(video_rows, GET_GLOBAL(vparam_g->theightm1));
404 SET_BDA(char_height, cheight);
405 SET_BDA(video_ctl, (0x60 | noclearmem));
406 SET_BDA(video_switches, 0xF9);
407 SET_BDA(modeset_ctl, GET_BDA(modeset_ctl) & 0x7f);
409 // FIXME We nearly have the good tables. to be reworked
410 SET_BDA(dcc_index, 0x08); // 8 is VGA should be ok for now
411 SET_BDA(video_savetable_ptr, (u32)video_save_pointer_table);
412 SET_BDA(video_savetable_seg, get_global_seg());
415 SET_BDA(video_msr, 0x00); // Unavailable on vanilla vga, but...
416 SET_BDA(video_pal, 0x00); // Unavailable on vanilla vga, but...
419 if (GET_GLOBAL(vmode_g->memmodel) & TEXT)
420 biosfn_set_cursor_shape(0x06, 0x07);
421 // Set cursor pos for page 0..7
423 for (i = 0; i < 8; i++) {
424 struct cursorpos cp = {0, 0, i};
429 biosfn_set_active_page(0x00);
431 // Write the fonts in memory
432 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
433 call16_vgaint(0x1104, 0);
434 call16_vgaint(0x1103, 0);
436 // Set the ints 0x1F and 0x43
437 SET_IVT(0x1f, get_global_seg(), (u32)&vgafont8[128 * 8]);
441 SET_IVT(0x43, get_global_seg(), (u32)vgafont8);
444 SET_IVT(0x43, get_global_seg(), (u32)vgafont14);
447 SET_IVT(0x43, get_global_seg(), (u32)vgafont16);
453 handle_1001(struct bregs *regs)
455 biosfn_set_cursor_shape(regs->ch, regs->cl);
459 handle_1002(struct bregs *regs)
461 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
466 handle_1003(struct bregs *regs)
468 regs->cx = biosfn_get_cursor_shape(regs->bh);
469 struct cursorpos cp = get_cursor_pos(regs->bh);
474 // Read light pen pos (unimplemented)
476 handle_1004(struct bregs *regs)
479 regs->ax = regs->bx = regs->cx = regs->dx = 0;
483 handle_1005(struct bregs *regs)
485 biosfn_set_active_page(regs->al);
489 verify_scroll(struct bregs *regs, int dir)
491 u8 page = GET_BDA(video_page);
492 struct cursorpos ul = {regs->cl, regs->ch, page};
493 struct cursorpos lr = {regs->dl, regs->dh, page};
495 if (ul.x > lr.x || ul.y > lr.y)
498 u16 nbrows = GET_BDA(video_rows) + 1;
499 u16 nbcols = GET_BDA(video_cols);
506 vgafb_scroll(dir * regs->al, regs->bh, ul, lr);
510 handle_1006(struct bregs *regs)
512 verify_scroll(regs, 1);
516 handle_1007(struct bregs *regs)
518 verify_scroll(regs, -1);
522 handle_1008(struct bregs *regs)
524 struct carattr ca = vgafb_read_char(get_cursor_pos(regs->bh));
530 write_chars(u8 page, struct carattr ca, u16 count)
532 struct cursorpos cp = get_cursor_pos(page);
534 vgafb_write_char(cp, ca);
540 handle_1009(struct bregs *regs)
542 struct carattr ca = {regs->al, regs->bl, 1};
543 write_chars(regs->bh, ca, regs->cx);
547 handle_100a(struct bregs *regs)
549 struct carattr ca = {regs->al, regs->bl, 0};
550 write_chars(regs->bh, ca, regs->cx);
555 handle_100b00(struct bregs *regs)
557 vgahw_set_border_color(regs->bl);
561 handle_100b01(struct bregs *regs)
563 vgahw_set_palette(regs->bl);
567 handle_100bXX(struct bregs *regs)
573 handle_100b(struct bregs *regs)
576 case 0x00: handle_100b00(regs); break;
577 case 0x01: handle_100b01(regs); break;
578 default: handle_100bXX(regs); break;
584 handle_100c(struct bregs *regs)
587 biosfn_write_pixel(regs->bh, regs->al, regs->cx, regs->dx);
591 handle_100d(struct bregs *regs)
594 biosfn_read_pixel(regs->bh, regs->cx, regs->dx, ®s->ax);
598 handle_100e(struct bregs *regs)
600 // Ralf Brown Interrupt list is WRONG on bh(page)
601 // We do output only on the current page !
602 struct carattr ca = {regs->al, regs->bl, 0};
603 struct cursorpos cp = get_cursor_pos(0xff);
604 cp = write_teletype(cp, ca);
609 handle_100f(struct bregs *regs)
611 regs->bh = GET_BDA(video_page);
612 regs->al = GET_BDA(video_mode) | (GET_BDA(video_ctl) & 0x80);
613 regs->ah = GET_BDA(video_cols);
618 handle_101000(struct bregs *regs)
622 vgahw_set_single_palette_reg(regs->bl, regs->bh);
626 handle_101001(struct bregs *regs)
628 vgahw_set_overscan_border_color(regs->bh);
632 handle_101002(struct bregs *regs)
634 vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
638 handle_101003(struct bregs *regs)
640 vgahw_toggle_intensity(regs->bl);
644 handle_101007(struct bregs *regs)
648 regs->bh = vgahw_get_single_palette_reg(regs->bl);
652 handle_101008(struct bregs *regs)
654 regs->bh = vgahw_get_overscan_border_color(regs);
658 handle_101009(struct bregs *regs)
660 vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
664 handle_101010(struct bregs *regs)
666 u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
667 vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
671 handle_101012(struct bregs *regs)
673 vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
677 handle_101013(struct bregs *regs)
679 vgahw_select_video_dac_color_page(regs->bl, regs->bh);
683 handle_101015(struct bregs *regs)
686 vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
693 handle_101017(struct bregs *regs)
695 vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
699 handle_101018(struct bregs *regs)
701 vgahw_set_pel_mask(regs->bl);
705 handle_101019(struct bregs *regs)
707 regs->bl = vgahw_get_pel_mask();
711 handle_10101a(struct bregs *regs)
713 vgahw_read_video_dac_state(®s->bl, ®s->bh);
717 handle_10101b(struct bregs *regs)
719 biosfn_perform_gray_scale_summing(regs->bx, regs->cx);
723 handle_1010XX(struct bregs *regs)
729 handle_1010(struct bregs *regs)
732 case 0x00: handle_101000(regs); break;
733 case 0x01: handle_101001(regs); break;
734 case 0x02: handle_101002(regs); break;
735 case 0x03: handle_101003(regs); break;
736 case 0x07: handle_101007(regs); break;
737 case 0x08: handle_101008(regs); break;
738 case 0x09: handle_101009(regs); break;
739 case 0x10: handle_101010(regs); break;
740 case 0x12: handle_101012(regs); break;
741 case 0x13: handle_101013(regs); break;
742 case 0x15: handle_101015(regs); break;
743 case 0x17: handle_101017(regs); break;
744 case 0x18: handle_101018(regs); break;
745 case 0x19: handle_101019(regs); break;
746 case 0x1a: handle_10101a(regs); break;
747 case 0x1b: handle_10101b(regs); break;
748 default: handle_1010XX(regs); break;
754 handle_101100(struct bregs *regs)
756 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
757 , regs->dx, regs->bl, regs->bh);
761 handle_101101(struct bregs *regs)
763 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
767 handle_101102(struct bregs *regs)
769 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
773 handle_101103(struct bregs *regs)
775 vgahw_set_text_block_specifier(regs->bl);
779 handle_101104(struct bregs *regs)
781 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
785 handle_101110(struct bregs *regs)
787 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
788 , regs->dx, regs->bl, regs->bh);
789 set_scan_lines(regs->bh);
793 handle_101111(struct bregs *regs)
795 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
800 handle_101112(struct bregs *regs)
802 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
807 handle_101114(struct bregs *regs)
809 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
814 handle_101130(struct bregs *regs)
818 u32 segoff = GET_IVT(0x1f).segoff;
819 regs->es = segoff >> 16;
824 u32 segoff = GET_IVT(0x43).segoff;
825 regs->es = segoff >> 16;
830 regs->es = get_global_seg();
831 regs->bp = (u32)vgafont14;
834 regs->es = get_global_seg();
835 regs->bp = (u32)vgafont8;
838 regs->es = get_global_seg();
839 regs->bp = (u32)vgafont8 + 128 * 8;
842 regs->es = get_global_seg();
843 regs->bp = (u32)vgafont14alt;
846 regs->es = get_global_seg();
847 regs->bp = (u32)vgafont16;
850 regs->es = get_global_seg();
851 regs->bp = (u32)vgafont16alt;
854 dprintf(1, "Get font info BH(%02x) was discarded\n", regs->bh);
857 // Set byte/char of on screen font
858 regs->cx = GET_BDA(char_height) & 0xff;
860 // Set Highest char row
861 regs->dx = GET_BDA(video_rows);
865 handle_1011XX(struct bregs *regs)
871 handle_1011(struct bregs *regs)
874 case 0x00: handle_101100(regs); break;
875 case 0x01: handle_101101(regs); break;
876 case 0x02: handle_101102(regs); break;
877 case 0x03: handle_101103(regs); break;
878 case 0x04: handle_101104(regs); break;
879 case 0x10: handle_101110(regs); break;
880 case 0x11: handle_101111(regs); break;
881 case 0x12: handle_101112(regs); break;
882 case 0x14: handle_101114(regs); break;
883 case 0x30: handle_101130(regs); break;
884 default: handle_1011XX(regs); break;
890 handle_101210(struct bregs *regs)
892 u16 crtc_addr = GET_BDA(crtc_address);
893 if (crtc_addr == VGAREG_MDA_CRTC_ADDRESS)
897 regs->cx = GET_BDA(video_switches) & 0x0f;
901 handle_101230(struct bregs *regs)
903 u8 mctl = GET_BDA(modeset_ctl);
904 u8 vswt = GET_BDA(video_switches);
908 mctl = (mctl & ~0x10) | 0x80;
909 vswt = (vswt & ~0x0f) | 0x08;
914 vswt = (vswt & ~0x0f) | 0x09;
918 mctl = (mctl & ~0x80) | 0x10;
919 vswt = (vswt & ~0x0f) | 0x09;
922 dprintf(1, "Select vert res (%02x) was discarded\n", regs->al);
925 SET_BDA(modeset_ctl, mctl);
926 SET_BDA(video_switches, vswt);
931 handle_101231(struct bregs *regs)
933 u8 v = (regs->al & 0x01) << 3;
934 u8 mctl = GET_BDA(video_ctl) & ~0x08;
935 SET_BDA(video_ctl, mctl | v);
940 handle_101232(struct bregs *regs)
942 vgahw_enable_video_addressing(regs->al);
947 handle_101233(struct bregs *regs)
949 u8 v = ((regs->al << 1) & 0x02) ^ 0x02;
950 u8 v2 = GET_BDA(modeset_ctl) & ~0x02;
951 SET_BDA(modeset_ctl, v | v2);
956 handle_101234(struct bregs *regs)
958 u8 v = (regs->al & 0x01) ^ 0x01;
959 u8 v2 = GET_BDA(modeset_ctl) & ~0x01;
960 SET_BDA(modeset_ctl, v | v2);
965 handle_101235(struct bregs *regs)
972 handle_101236(struct bregs *regs)
979 handle_1012XX(struct bregs *regs)
985 handle_1012(struct bregs *regs)
988 case 0x10: handle_101210(regs); break;
989 case 0x30: handle_101230(regs); break;
990 case 0x31: handle_101231(regs); break;
991 case 0x32: handle_101232(regs); break;
992 case 0x33: handle_101233(regs); break;
993 case 0x34: handle_101234(regs); break;
994 case 0x35: handle_101235(regs); break;
995 case 0x36: handle_101236(regs); break;
996 default: handle_1012XX(regs); break;
999 // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
1004 handle_1013(struct bregs *regs)
1007 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
1008 write_string(cp, regs->al, regs->bl, regs->cx
1009 , regs->es, (void*)(regs->bp + 0));
1014 handle_101a00(struct bregs *regs)
1016 regs->bx = GET_BDA(dcc_index);
1021 handle_101a01(struct bregs *regs)
1023 SET_BDA(dcc_index, regs->bl);
1024 dprintf(1, "Alternate Display code (%02x) was discarded\n", regs->bh);
1029 handle_101aXX(struct bregs *regs)
1035 handle_101a(struct bregs *regs)
1038 case 0x00: handle_101a00(regs); break;
1039 case 0x01: handle_101a01(regs); break;
1040 default: handle_101aXX(regs); break;
1046 u16 static_functionality_off;
1047 u16 static_functionality_seg;
1067 handle_101b(struct bregs *regs)
1070 struct funcInfo *info = (void*)(regs->di+0);
1071 memset_far(seg, info, 0, sizeof(*info));
1072 // Address of static functionality table
1073 SET_FARVAR(seg, info->static_functionality_off, (u32)static_functionality);
1074 SET_FARVAR(seg, info->static_functionality_seg, get_global_seg());
1076 // Hard coded copy from BIOS area. Should it be cleaner ?
1077 memcpy_far(seg, info->bda_0x49, SEG_BDA, (void*)0x49, 30);
1078 memcpy_far(seg, info->bda_0x84, SEG_BDA, (void*)0x84, 3);
1080 SET_FARVAR(seg, info->dcc_index, GET_BDA(dcc_index));
1081 SET_FARVAR(seg, info->colors, 16);
1082 SET_FARVAR(seg, info->pages, 8);
1083 SET_FARVAR(seg, info->scan_lines, 2);
1084 SET_FARVAR(seg, info->video_mem, 3);
1090 handle_101c00(struct bregs *regs)
1092 u16 flags = regs->cx;
1095 size += sizeof(struct saveVideoHardware);
1097 size += sizeof(struct saveBDAstate);
1099 size += sizeof(struct saveDACcolors);
1105 handle_101c01(struct bregs *regs)
1107 u16 flags = regs->cx;
1109 void *data = (void*)(regs->bx+0);
1111 vgahw_save_state(seg, data);
1112 data += sizeof(struct saveVideoHardware);
1115 biosfn_save_bda_state(seg, data);
1116 data += sizeof(struct saveBDAstate);
1119 vgahw_save_dac_state(seg, data);
1124 handle_101c02(struct bregs *regs)
1126 u16 flags = regs->cx;
1128 void *data = (void*)(regs->bx+0);
1130 vgahw_restore_state(seg, data);
1131 data += sizeof(struct saveVideoHardware);
1134 biosfn_restore_bda_state(seg, data);
1135 data += sizeof(struct saveBDAstate);
1138 vgahw_restore_dac_state(seg, data);
1143 handle_101cXX(struct bregs *regs)
1149 handle_101c(struct bregs *regs)
1152 case 0x00: handle_101c00(regs); break;
1153 case 0x01: handle_101c01(regs); break;
1154 case 0x02: handle_101c02(regs); break;
1155 default: handle_101cXX(regs); break;
1161 handle_104f00(struct bregs *regs)
1163 // XXX - vbe_biosfn_return_controller_information(&AX,ES,DI);
1164 // XXX - OR cirrus_vesa_00h
1168 handle_104f01(struct bregs *regs)
1170 // XXX - vbe_biosfn_return_mode_information(&AX,CX,ES,DI);
1171 // XXX - OR cirrus_vesa_01h
1175 handle_104f02(struct bregs *regs)
1177 // XXX - vbe_biosfn_set_mode(&AX,BX,ES,DI);
1178 // XXX - OR cirrus_vesa_02h
1182 handle_104f03(struct bregs *regs)
1184 // XXX - vbe_biosfn_return_current_mode
1185 // XXX - OR cirrus_vesa_03h
1189 handle_104f04(struct bregs *regs)
1191 // XXX - vbe_biosfn_save_restore_state(&AX, CX, DX, ES, &BX);
1195 handle_104f05(struct bregs *regs)
1197 // XXX - vbe_biosfn_display_window_control
1198 // XXX - OR cirrus_vesa_05h
1202 handle_104f06(struct bregs *regs)
1204 // XXX - vbe_biosfn_set_get_logical_scan_line_length
1205 // XXX - OR cirrus_vesa_06h
1209 handle_104f07(struct bregs *regs)
1211 // XXX - vbe_biosfn_set_get_display_start
1212 // XXX - OR cirrus_vesa_07h
1216 handle_104f08(struct bregs *regs)
1218 // XXX - vbe_biosfn_set_get_dac_palette_format
1222 handle_104f0a(struct bregs *regs)
1224 // XXX - vbe_biosfn_return_protected_mode_interface
1228 handle_104fXX(struct bregs *regs)
1235 handle_104f(struct bregs *regs)
1237 if (! CONFIG_VBE || !vbe_has_vbe_display()) {
1238 handle_104fXX(regs);
1243 case 0x00: handle_104f00(regs); break;
1244 case 0x01: handle_104f01(regs); break;
1245 case 0x02: handle_104f02(regs); break;
1246 case 0x03: handle_104f03(regs); break;
1247 case 0x04: handle_104f04(regs); break;
1248 case 0x05: handle_104f05(regs); break;
1249 case 0x06: handle_104f06(regs); break;
1250 case 0x07: handle_104f07(regs); break;
1251 case 0x08: handle_104f08(regs); break;
1252 case 0x0a: handle_104f0a(regs); break;
1253 default: handle_104fXX(regs); break;
1259 handle_10XX(struct bregs *regs)
1264 // INT 10h Video Support Service Entry Point
1266 handle_10(struct bregs *regs)
1268 debug_enter(regs, DEBUG_VGA_10);
1270 case 0x00: handle_1000(regs); break;
1271 case 0x01: handle_1001(regs); break;
1272 case 0x02: handle_1002(regs); break;
1273 case 0x03: handle_1003(regs); break;
1274 case 0x04: handle_1004(regs); break;
1275 case 0x05: handle_1005(regs); break;
1276 case 0x06: handle_1006(regs); break;
1277 case 0x07: handle_1007(regs); break;
1278 case 0x08: handle_1008(regs); break;
1279 case 0x09: handle_1009(regs); break;
1280 case 0x0a: handle_100a(regs); break;
1281 case 0x0b: handle_100b(regs); break;
1282 case 0x0c: handle_100c(regs); break;
1283 case 0x0d: handle_100d(regs); break;
1284 case 0x0e: handle_100e(regs); break;
1285 case 0x0f: handle_100f(regs); break;
1286 case 0x10: handle_1010(regs); break;
1287 case 0x11: handle_1011(regs); break;
1288 case 0x12: handle_1012(regs); break;
1289 case 0x13: handle_1013(regs); break;
1290 case 0x1a: handle_101a(regs); break;
1291 case 0x1b: handle_101b(regs); break;
1292 case 0x1c: handle_101c(regs); break;
1293 case 0x4f: handle_104f(regs); break;
1294 default: handle_10XX(regs); break;
1299 /****************************************************************
1301 ****************************************************************/
1306 // init detected hardware BIOS Area
1307 // set 80x25 color (not clear from RBIL but usual)
1308 u16 eqf = GET_BDA(equipment_list_flags);
1309 SET_BDA(equipment_list_flags, (eqf & 0xffcf) | 0x20);
1311 // Just for the first int10 find its children
1313 // the default char height
1314 SET_BDA(char_height, 0x10);
1317 SET_BDA(video_ctl, 0x60);
1319 // Set the basic screen we have
1320 SET_BDA(video_switches, 0xf9);
1322 // Set the basic modeset options
1323 SET_BDA(modeset_ctl, 0x51);
1325 // Set the default MSR
1326 SET_BDA(video_msr, 0x09);
1330 vga_post(struct bregs *regs)
1332 debug_enter(regs, DEBUG_VGA_POST);
1341 extern void entry_10(void);
1342 SET_IVT(0x10, get_global_seg(), (u32)entry_10);
1347 // XXX - clear screen and display info
1350 SET_VGA(video_save_pointer_table[0], (u32)video_param_table);
1351 SET_VGA(video_save_pointer_table[1], get_global_seg());
1354 extern u8 _rom_header_size, _rom_header_checksum;
1355 SET_VGA(_rom_header_checksum, 0);
1356 u8 sum = -checksum_far(get_global_seg(), 0, _rom_header_size * 512);
1357 SET_VGA(_rom_header_checksum, sum);