1 #include "vgabios.h" // struct vbe_modeinfo
5 #include "config.h" // CONFIG_*
6 #include "biosvar.h" // SET_BDA
14 } bochsvga_modes[] VAR16 = {
16 { 0x100, 640, 400, 8 },
17 { 0x101, 640, 480, 8 },
18 { 0x102, 800, 600, 4 },
19 { 0x103, 800, 600, 8 },
20 { 0x104, 1024, 768, 4 },
21 { 0x105, 1024, 768, 8 },
22 { 0x106, 1280, 1024, 4 },
23 { 0x107, 1280, 1024, 8 },
24 { 0x10D, 320, 200, 15 },
25 { 0x10E, 320, 200, 16 },
26 { 0x10F, 320, 200, 24 },
27 { 0x110, 640, 480, 15 },
28 { 0x111, 640, 480, 16 },
29 { 0x112, 640, 480, 24 },
30 { 0x113, 800, 600, 15 },
31 { 0x114, 800, 600, 16 },
32 { 0x115, 800, 600, 24 },
33 { 0x116, 1024, 768, 15 },
34 { 0x117, 1024, 768, 16 },
35 { 0x118, 1024, 768, 24 },
36 { 0x119, 1280, 1024, 15 },
37 { 0x11A, 1280, 1024, 16 },
38 { 0x11B, 1280, 1024, 24 },
39 { 0x11C, 1600, 1200, 8 },
40 { 0x11D, 1600, 1200, 15 },
41 { 0x11E, 1600, 1200, 16 },
42 { 0x11F, 1600, 1200, 24 },
44 { 0x140, 320, 200, 32 },
45 { 0x141, 640, 400, 32 },
46 { 0x142, 640, 480, 32 },
47 { 0x143, 800, 600, 32 },
48 { 0x144, 1024, 768, 32 },
49 { 0x145, 1280, 1024, 32 },
50 { 0x146, 320, 200, 8 },
51 { 0x147, 1600, 1200, 32 },
52 { 0x148, 1152, 864, 8 },
53 { 0x149, 1152, 864, 15 },
54 { 0x14a, 1152, 864, 16 },
55 { 0x14b, 1152, 864, 24 },
56 { 0x14c, 1152, 864, 32 },
57 { 0x178, 1280, 800, 16 },
58 { 0x179, 1280, 800, 24 },
59 { 0x17a, 1280, 800, 32 },
60 { 0x17b, 1280, 960, 16 },
61 { 0x17c, 1280, 960, 24 },
62 { 0x17d, 1280, 960, 32 },
63 { 0x17e, 1440, 900, 16 },
64 { 0x17f, 1440, 900, 24 },
65 { 0x180, 1440, 900, 32 },
66 { 0x181, 1400, 1050, 16 },
67 { 0x182, 1400, 1050, 24 },
68 { 0x183, 1400, 1050, 32 },
69 { 0x184, 1680, 1050, 16 },
70 { 0x185, 1680, 1050, 24 },
71 { 0x186, 1680, 1050, 32 },
72 { 0x187, 1920, 1200, 16 },
73 { 0x188, 1920, 1200, 24 },
74 { 0x189, 1920, 1200, 32 },
75 { 0x18a, 2560, 1600, 16 },
76 { 0x18b, 2560, 1600, 24 },
77 { 0x18c, 2560, 1600, 32 },
81 #define BYTES_PER_PIXEL(m) ((GET_GLOBAL((m)->depth) + 7) / 8)
83 u32 pci_lfb_addr VAR16;
85 static inline u32 pci_config_readl(u8 bus, u8 devfn, u16 addr)
89 u16 bdf = (bus << 16) | devfn;
97 : "=a"(status), "=c"(val)
98 : "a"(0xb10a), "b"(bdf), "D"(addr)
108 static u16 dispi_get_max_xres(void)
113 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
115 dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
116 xres = dispi_read(VBE_DISPI_INDEX_XRES);
117 dispi_write(VBE_DISPI_INDEX_ENABLE, en);
122 static u16 dispi_get_max_bpp(void)
127 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
129 dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
130 bpp = dispi_read(VBE_DISPI_INDEX_BPP);
131 dispi_write(VBE_DISPI_INDEX_ENABLE, en);
136 /* Called only during POST */
138 bochsvga_init(u8 bus, u8 devfn)
142 if (!CONFIG_VGA_BOCHS)
146 dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID0);
147 if (dispi_read(VBE_DISPI_INDEX_ID) != VBE_DISPI_ID0) {
148 dprintf(1, "No VBE DISPI interface detected\n");
152 SET_BDA(vbe_flag, 0x1);
153 dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5);
156 lfb_addr = pci_config_readl(bus, devfn, 0x10) & ~0xf;
158 lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
160 SET_FARVAR(get_global_seg(), pci_lfb_addr, lfb_addr);
162 dprintf(1, "VBE DISPI detected. lfb_addr=%x\n", GET_GLOBAL(pci_lfb_addr));
168 bochsvga_enabled(void)
170 return GET_BDA(vbe_flag);
174 bochsvga_total_mem(void)
176 return dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K);
179 static struct mode *find_mode_entry(u16 mode)
183 for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) {
184 if (GET_GLOBAL(m->mode) == mode)
191 static int mode_valid(struct mode *m)
193 u16 max_xres = dispi_get_max_xres();
194 u16 max_bpp = dispi_get_max_bpp();
195 u32 max_mem = bochsvga_total_mem() * 64 * 1024;
197 u32 mem = GET_GLOBAL(m->width) * GET_GLOBAL(m->height) *
200 if (GET_GLOBAL(m->width) > max_xres ||
201 GET_GLOBAL(m->depth) > max_bpp ||
209 bochsvga_list_modes(u16 seg, u16 ptr)
212 u16 *dest = (u16 *)(u32)ptr;
215 for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) {
219 dprintf(1, "VBE found mode %x valid.\n", GET_GLOBAL(m->mode));
220 SET_FARVAR(seg, dest[count], GET_GLOBAL(m->mode));
225 SET_FARVAR(seg, dest[count], 0xffff); /* End of list */
231 bochsvga_mode_info(u16 mode, struct vbe_modeinfo *info)
235 m = find_mode_entry(mode);
236 if (!m || !mode_valid(m))
239 info->width = GET_GLOBAL(m->width);
240 info->height = GET_GLOBAL(m->height);
241 info->depth = GET_GLOBAL(m->depth);
243 info->linesize = info->width * ((info->depth + 7) / 8);
244 info->phys_base = GET_GLOBAL(pci_lfb_addr);
245 info->vram_size = bochsvga_total_mem() * 64 * 1024;
251 bochsvga_hires_enable(int enable)
255 VBE_DISPI_LFB_ENABLED |
256 VBE_DISPI_NOCLEARMEM : 0;
258 dispi_write(VBE_DISPI_INDEX_ENABLE, flags);
262 bochsvga_set_mode(u16 mode, struct vbe_modeinfo *info)
264 if (info->depth == 4)
265 vga_set_mode(0x6a, 0);
266 if (info->depth == 8)
267 // XXX load_dac_palette(3);
270 dispi_write(VBE_DISPI_INDEX_BPP, info->depth);
271 dispi_write(VBE_DISPI_INDEX_XRES, info->width);
272 dispi_write(VBE_DISPI_INDEX_YRES, info->height);
273 dispi_write(VBE_DISPI_INDEX_BANK, 0);
275 /* VGA compat setup */
276 //XXX: This probably needs some reverse engineering
278 outw(0x0011, VGAREG_VGA_CRTC_ADDRESS);
279 outw(((info->width * 4 - 1) << 8) | 0x1, VGAREG_VGA_CRTC_ADDRESS);
280 dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, info->width);
281 outw(((info->height - 1) << 8) | 0x12, VGAREG_VGA_CRTC_ADDRESS);
282 outw(((info->height - 1) & 0xff00) | 0x7, VGAREG_VGA_CRTC_ADDRESS);
283 v = inb(VGAREG_VGA_CRTC_DATA) & 0xbd;
288 outb(v, VGAREG_VGA_CRTC_DATA);
290 outw(0x9, VGAREG_VGA_CRTC_ADDRESS);
291 outb(0x17, VGAREG_VGA_CRTC_ADDRESS);
292 outb(inb(VGAREG_VGA_CRTC_DATA) | 0x3, VGAREG_VGA_CRTC_DATA);
293 v = inb(VGAREG_ACTL_RESET);
294 outw(0x10, VGAREG_ACTL_ADDRESS);
295 v = inb(VGAREG_ACTL_READ_DATA) | 0x1;
296 outb(v, VGAREG_ACTL_ADDRESS);
297 outb(0x20, VGAREG_ACTL_ADDRESS);
298 outw(0x0506, VGAREG_GRDC_ADDRESS);
299 outw(0x0f02, VGAREG_SEQU_ADDRESS);
300 if (info->depth >= 8) {
301 outb(0x14, VGAREG_VGA_CRTC_ADDRESS);
302 outb(inb(VGAREG_VGA_CRTC_DATA) | 0x40, VGAREG_VGA_CRTC_DATA);
303 v = inb(VGAREG_ACTL_RESET);
304 outw(0x10, VGAREG_ACTL_ADDRESS);
305 v = inb(VGAREG_ACTL_READ_DATA) | 0x40;
306 outb(v, VGAREG_ACTL_ADDRESS);
307 outb(0x20, VGAREG_ACTL_ADDRESS);
308 outb(0x04, VGAREG_SEQU_ADDRESS);
309 v = inb(VGAREG_SEQU_DATA) | 0x08;
310 outb(v, VGAREG_SEQU_DATA);
311 outb(0x05, VGAREG_GRDC_ADDRESS);
312 v = inb(VGAREG_GRDC_DATA) & 0x9f;
313 outb(v | 0x40, VGAREG_GRDC_DATA);
316 SET_BDA(vbe_mode, mode);
320 bochsvga_clear_scr(void)
324 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
325 en &= ~VBE_DISPI_NOCLEARMEM;
326 dispi_write(VBE_DISPI_INDEX_ENABLE, en);
330 bochsvga_hires_enabled(void)
332 return dispi_read(VBE_DISPI_INDEX_ENABLE) & VBE_DISPI_ENABLED;
336 bochsvga_curr_mode(void)
338 return GET_BDA(vbe_mode);