util/superiotool/superiotool.c

   1 /*
   2  * This file is part of the LinuxBIOS project.
   3  *
   4  * Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
   5  * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
   6  * Copyright (C) 2007 Carl-Daniel Hailfinger
   7  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  22  */
  23
  24 #include <stdio.h>
  25 #include <stdlib.h>
  26 #include <sys/io.h>
  27
  28 /* Well, they really thought this through, eh? Family is 8 bits! */
  29 static const char *familyid[] = {
  30         [0xf1] = "PC8374 (Winbond/NatSemi)"
  31 };
  32
  33 unsigned char regval(unsigned short port, unsigned char reg)
  34 {
  35         outb(reg, port);
  36         return inb(port + 1);
  37 }
  38
  39 void regwrite(unsigned short port, unsigned char reg, unsigned char val)
  40 {
  41         outb(reg, port);
  42         outb(val, port + 1);
  43 }
  44
  45 void dump_ns8374(unsigned short port)
  46 {
  47         printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
  48                regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
  49                regval(port, 0x24), regval(port, 0x26));
  50         printf("SMBUS at %02x\n", regval(port, 0x2a));
  51
  52         /* Check COM1. This is all we care about at present. */
  53         printf("COM 1 is globally %s\n",
  54                regval(port, 0x26) & 8 ? "disabled" : "enabled");
  55
  56         /* Select COM1. */
  57         regwrite(port, 0x07, 0x03);
  58         printf("COM 1 is locally %s\n",
  59                regval(port, 0x30) & 1 ? "enabled" : "disabled");
  60         printf
  61             ("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
  62              regval(port, 0x60), regval(port, 0x61), regval(port, 0x70),
  63              regval(port, 0x71), regval(port, 0x74), regval(port, 0x75),
  64              regval(port, 0xf0));
  65
  66         /* Select GPIO. */
  67         regwrite(port, 0x07, 0x07);
  68         printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
  69         printf
  70             ("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
  71              regval(port, 0x60), regval(port, 0x61), regval(port, 0x70),
  72              regval(port, 0x71), regval(port, 0x74), regval(port, 0x75),
  73              regval(port, 0xf0));
  74 }
  75
  76 void dump_fintek(unsigned short port, unsigned int did)
  77 {
  78         switch (did) {
  79         case 0x0604:
  80                 printf("Fintek F71805\n");
  81                 break;
  82         case 0x4103:
  83                 printf("Fintek F71872\n");
  84                 break;
  85         default:
  86                 printf("Unknown Fintek Super I/O: did=0x%04x\n", did);
  87                 return;
  88         }
  89
  90         printf("Flash write is %s.\n",
  91                regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
  92         printf("Flash control is 0x%04x.\n", regval(port, 0x28));
  93         printf("27=%02x\n", regval(port, 0x27));
  94         printf("29=%02x\n", regval(port, 0x29));
  95         printf("2a=%02x\n", regval(port, 0x2a));
  96         printf("2b=%02x\n", regval(port, 0x2b));
  97
  98         /* Select UART 1. */
  99         regwrite(port, 0x07, 0x01);
 100         printf("UART1 is %s\n",
 101                regval(port, 0x30) & 1 ? "enabled" : "disabled");
 102         printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
 103                regval(port, 0x61), regval(port, 0x70) & 0x0f,
 104                regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
 105
 106         /* Select UART 2. */
 107         regwrite(port, 0x07, 0x02);
 108         printf("UART2 is %s\n",
 109                regval(port, 0x30) & 1 ? "enabled" : "disabled");
 110         printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
 111                regval(port, 0x61), regval(port, 0x70) & 0x0f,
 112                regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
 113
 114         /* Select parallel port. */
 115         regwrite(port, 0x07, 0x03);
 116         printf("PARPORT is %s\n",
 117                regval(port, 0x30) & 1 ? "enabled" : "disabled");
 118         printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60),
 119                regval(port, 0x61), regval(port, 0x70) & 0x0f);
 120
 121         /* Select HW monitor. */
 122         regwrite(port, 0x07, 0x04);
 123         printf("HW monitor is %s\n",
 124                regval(port, 0x30) & 1 ? "enabled" : "disabled");
 125         printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60),
 126                regval(port, 0x61), regval(port, 0x70) & 0x0f);
 127
 128         /* Select GPIO. */
 129         regwrite(port, 0x07, 0x05);
 130         printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
 131         printf
 132             ("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
 133              regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1),
 134              regval(port, 0xe2), regval(port, 0xe3), regval(port, 0xe4),
 135              regval(port, 0xe5));
 136         printf
 137             ("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
 138              regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8),
 139              regval(port, 0xe9), regval(port, 0xf0), regval(port, 0xf1),
 140              regval(port, 0xf3), regval(port, 0xf4));
 141         printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n", regval(port, 0xf5),
 142                regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
 143 }
 144
 145 #define EOT             -1              /* End Of Table */
 146 #define NOLDN           -2              /* NO LDN needed */
 147 #define NANA            -3              /* Not Available */
 148 #define MAXNAMELEN      20              /* Maximum Name Length */
 149 #define MAXLDN          0xa             /* Biggest LDN */
 150 #define LDNSIZE         (MAXLDN + 3)    /* Biggest LDN + 0 + NOLDN + EOT */
 151 #define MAXNUMIDX       70              /* Maximum number of indexes */
 152 #define IDXSIZE         (MAXNUMIDX + 1)
 153
 154 const static struct ite_registers {
 155         /* Yes, superio_id should be unsigned, but EOT has to be negative. */
 156         signed short superio_id;
 157         const char name[MAXNAMELEN];
 158         struct ite_ldnidx {
 159                 signed short ldn;
 160                 signed short idx[IDXSIZE];
 161                 signed short def[IDXSIZE];
 162         } ldn[LDNSIZE];
 163 } ite_reg_table[] = {
 164         {0x8702, "IT8702", {
 165                 {EOT}}},
 166         {0x8705, "IT8705 or IT8700", {
 167                 {EOT}}},
 168         {0x8708, "IT8708", {
 169                 {NOLDN,
 170                         {0x07,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
 171                          0x29,0x2a,0x2e,0x2f,EOT},
 172                         {NANA,0x87,0x08,0x00,0x00,NANA,0x3f,0x00,0xff,0xff,
 173                          0xff,0xff,0x00,0x00,EOT}},
 174                 {0x0,
 175                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
 176                         {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
 177                 {0x1,
 178                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 179                         {0x00,0x03,0xf8,0x04,0x00,EOT}},
 180                 {0x2,
 181                         {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
 182                         {0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
 183                 {0x3,
 184                         {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x74,
 185                          0xf0,EOT},
 186                         {0x00,0x03,0x78,0x07,0x78,0x00,0x80,0x07,0x03,
 187                          0x03,EOT}},
 188                 {0x4,
 189                         {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
 190                          0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
 191                         {NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
 192                          0x00,0x00,0x00,0x00,0x00,NANA,NANA,EOT}},
 193                 {0x5,   /* Note: 0x30 can actually be 0x00 _or_ 0x01. */
 194                         {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
 195                         {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
 196                 {0x6,
 197                         {0x30,0x70,0x71,0xf0,EOT},
 198                         {0x00,0x0c,0x02,0x00,EOT}},
 199                 {0x7,
 200                         {0x70,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,
 201                          0xbb,0xbc,0xbd,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc8,
 202                          0xc9,0xca,0xcb,0xcc,0xcd,0xd0,0xd1,0xd2,0xd3,0xd4,
 203                          0xd5,0xd6,0xd7,0xd8,0xd9,0xda,0xdb,0xdc,0xf0,0xf1,
 204                          0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,
 205                          0xfc,EOT},
 206                         {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 207                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 208                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 209                          0x00,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00,
 210                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,
 211                          0x00,EOT}},
 212                 {0x8,
 213                         {0x30,0x60,0x61,EOT},
 214                         {0x00,0x02,0x01,EOT}},
 215                 {0x9,
 216                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 217                         {0x00,0x03,0x10,0x0b,0x00,EOT}},
 218                 {0xa,
 219                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 220                         {0x00,0x03,0x00,0x0a,0x00,EOT}},
 221                 {EOT}}},
 222         {0x8710, "IT8710", {
 223                 {EOT}}},
 224         {0x8712, "IT8712", {
 225                 {NOLDN,
 226                         {0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
 227                         {NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}},
 228                 {0x0,
 229                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
 230                         {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
 231                 {0x1,
 232                         {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
 233                         {0x00,0x03,0xf8,0x04,0x00,0x50,0x00,0x7f,EOT}},
 234                 {0x2,
 235                         {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
 236                         {0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
 237                 {0x3,
 238                         {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
 239                         {0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
 240                 {0x4,
 241                         {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
 242                          0xf4,0xf5,0xf6,EOT},
 243                         {0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
 244                          0x00,NANA,NANA,EOT}},
 245                 {0x5,
 246                         {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
 247                         {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x08,EOT}},
 248                 {0x6,
 249                         {0x30,0x70,0x71,0xf0,EOT},
 250                         {0x00,0x0c,0x02,0x00,EOT}},
 251                 {0x7,
 252                         {0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
 253                          0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
 254                          0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
 255                          0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
 256                          0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,
 257                          0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
 258                         {0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
 259                          0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,
 260                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 261                          0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
 262                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 263                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
 264                 {0x8,
 265                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 266                         {0x00,0x03,0x00,0x0a,0x00,EOT}},
 267                 {0x9,
 268                         {0x30,0x60,0x61,EOT},
 269                         {0x00,0x02,0x01,EOT}},
 270                 {0xa,
 271                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 272                         {0x00,0x03,0x10,0x0b,0x00,EOT}},
 273                 {EOT}}},
 274         {0x8716, "IT8716", {
 275                 {NOLDN,
 276                         {0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
 277                         {NANA,0x87,0x16,0x01,0x00,0x00,0x00,EOT}},
 278                 {0x0,
 279                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
 280                         {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
 281                 {0x1,
 282                         {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
 283                         {0x00,0x03,0xf8,0x04,0x00,0x50,0x00,0x7f,EOT}},
 284                 {0x2,
 285                         {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
 286                         {0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
 287                 {0x3,
 288                         {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
 289                         {0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
 290                 {0x4,
 291                         {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
 292                          0xf4,0xf5,0xf6,EOT},
 293                         {0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
 294                          0x00,NANA,NANA,EOT}},
 295                 {0x5,
 296                         {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
 297                         {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
 298                 {0x6,
 299                         {0x30,0x70,0x71,0xf0,EOT},
 300                         {0x00,0x0c,0x02,0x00,EOT}},
 301                 {0x7,
 302                         {0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
 303                          0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
 304                          0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
 305                          0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
 306                          0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,
 307                          0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
 308                         {0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
 309                          0x00,0x00,0x00,0x00,0x00,0x20,0x38,0x00,0x00,0x00,
 310                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 311                          0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
 312                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 313                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
 314                 {0x8,
 315                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 316                         {0x00,0x03,0x00,0x0a,0x00,EOT}},
 317                 {0x9,
 318                         {0x30,0x60,0x61,EOT},
 319                         {0x00,0x02,0x01,EOT}},
 320                 {0xa,
 321                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 322                         {0x00,0x03,0x10,0x0b,0x00,EOT}},
 323                 {EOT}}},
 324         {0x8718, "IT8718", {
 325                 {EOT}}},
 326         {EOT}
 327 };
 328
 329 void dump_ite(unsigned short port, unsigned short id)
 330 {
 331         int i, j, k;
 332         signed short *idx;
 333         printf ("ITE ");
 334
 335         /* ID Mapping Table
 336            unknown -> IT8711 (no datasheet)
 337            unknown -> IT8722 (no datasheet)
 338            0x8702 -> IT8702
 339            0x8705 -> IT8700 or IT8705
 340            0x8708 -> IT8708
 341            0x8710 -> IT8710
 342            0x8712 -> IT8712
 343            0x8716 -> IT8716
 344            0x8718 -> IT8718
 345            0x8726 -> IT8726 (datasheet wrongly says 0x8716)
 346          */
 347         switch (id) {
 348         case 0x8702:
 349         case 0x8705:
 350         case 0x8708:
 351         case 0x8710:
 352         case 0x8712:
 353         case 0x8716:
 354         case 0x8718:
 355                 for (i = 0;; i++) {
 356                         if (ite_reg_table[i].superio_id == EOT)
 357                                 break;
 358                         if ((unsigned short)ite_reg_table[i].superio_id != id)
 359                                 continue;
 360                         printf("%s\n", ite_reg_table[i].name);
 361                         for (j = 0;; j++) {
 362                                 if (ite_reg_table[i].ldn[j].ldn == EOT)
 363                                         break;
 364                                 if (ite_reg_table[i].ldn[j].ldn != NOLDN) {
 365                                         printf("Switching to LDN 0x%01x\n",
 366                                                ite_reg_table[i].ldn[j].ldn);
 367                                         regwrite(port, 0x07,
 368                                                  ite_reg_table[i].ldn[j].ldn);
 369                                 }
 370                                 idx = ite_reg_table[i].ldn[j].idx;
 371                                 printf("idx ");
 372                                 for (k = 0;; k++) {
 373                                         if (idx[k] == EOT)
 374                                                 break;
 375                                         printf("%02x ", idx[k]);
 376                                 }
 377                                 printf("\nval ");
 378                                 for (k = 0;; k++) {
 379                                         if (idx[k] == EOT)
 380                                                 break;
 381                                         printf("%02x ", regval(port, idx[k]));
 382                                 }
 383                                 printf("\ndef ");
 384                                 idx = ite_reg_table[i].ldn[j].def;
 385                                 for (k = 0;; k++) {
 386                                         if (idx[k] == EOT)
 387                                                 break;
 388                                         if (idx[k] == NANA)
 389                                                 printf("NA ");
 390                                         else
 391                                                 printf("%02x ", idx[k]);
 392                                 }
 393                                 printf("\n");
 394                         }
 395                 }
 396                 break;
 397         default:
 398                 printf("Unknown ITE chip, id=%04x\n", id);
 399                 for (i = 0x20; i <= 0x24; i++)
 400                         printf("index %02x=%02x\n", i, regval(port, i));
 401                 break;
 402         }
 403 }
 404
 405 void probe_idregs_simple(unsigned short port)
 406 {
 407         unsigned char id;
 408         outb(0x20, port);
 409         if (inb(port) != 0x20) {
 410                 if (inb(port) == 0xff)
 411                         printf("No SuperI/O chip found at 0x%04x\n", port);
 412                 else
 413                         printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", port, inb(port), inb(port + 1));
 414                 return;
 415         }
 416         id = inb(port + 1);
 417
 418         printf("SuperI/O found at 0x%02x: id = 0x%02x\n", port, id);
 419         if (id == 0xff)
 420                 return;
 421
 422         if (familyid[id])
 423                 printf("%s\n", familyid[id]);
 424         else
 425                 printf("<unknown>\n");
 426
 427         switch (id) {
 428         case 0xf1:
 429                 dump_ns8374(port);
 430                 break;
 431         default:
 432                 printf("no dump for 0x%02x\n", id);
 433                 break;
 434         }
 435 }
 436
 437 void probe_idregs_fintek(unsigned short port)
 438 {
 439         unsigned int vid, did, success = 0;
 440
 441         /* Enable configuration sequence (Fintek uses this for example)
 442          * Older ITE chips have the same enable sequence.
 443          */
 444         outb(0x87, port);
 445         outb(0x87, port);
 446
 447         outb(0x20, port);
 448         if (inb(port) != 0x20) {
 449                 if (inb(port) == 0xff)
 450                         printf("No SuperIO chip found at 0x%04x\n", port);
 451                 else
 452                         printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", port, inb(port), inb(port + 1));
 453                 return;
 454         }
 455         did = inb(port + 1);
 456         did |= (regval(port, 0x21) << 8);
 457
 458         vid = regval(port, 0x23);
 459         vid |= (regval(port, 0x24) << 8);
 460
 461         printf("Super I/O found at 0x%02x: vid=0x%04x/did=0x%04x\n",
 462                port, vid, did);
 463
 464         if (vid == 0xff || vid == 0xffff)
 465                 return;
 466
 467         /* printf("%s\n", familyid[id]); */
 468         switch (did) {
 469         case 0x0887:            /* Pseudoreversed for ITE8708 */
 470         case 0x1087:            /* Pseudoreversed for ITE8710 */
 471                 success = 1;
 472                 dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8));
 473                 regwrite(port, 0x02, 0x02);     /* Exit MB PnP mode. */
 474                 break;
 475         default:
 476                 break;
 477         }
 478
 479         switch (vid) {
 480         case 0x3419:
 481                 success = 1;
 482                 dump_fintek(port, did);
 483                 break;
 484         default:
 485                 break;
 486         }
 487
 488         if (!success)
 489                 printf("No dump for vid 0x%04x, did 0x%04x\n", vid, did);
 490
 491         /* Exit MB PnP mode (for Fintek, doesn't hurt ITE). */
 492         outb(0xaa, port);
 493 }
 494
 495 void probe_idregs_ite(unsigned short port)
 496 {
 497         unsigned int id, chipver;
 498
 499         /* Enable configuration sequence (ITE uses this for newer IT87[012]x)
 500          * IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
 501          * IT8708 uses 0x87, 0x87 -> fintek detection should handle it
 502          * IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
 503          * IT86xx series uses different ports
 504          * IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
 505          * IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes
 506          */
 507         outb(0x87, port);
 508         outb(0x01, port);
 509         outb(0x55, port);
 510         if (port == 0x2e)
 511                 outb(0x55, port);
 512         else
 513                 outb(0xAA, port);
 514
 515         /* Read Chip ID Byte 1. */
 516         id = regval(port, 0x20);
 517         if (id != 0x87) {
 518                 if (inb(port) == 0xff)
 519                         printf("No Super-I/O chip found at 0x%04x\n", port);
 520                 else
 521                         printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", port, inb(port), inb(port + 1));
 522                 return;
 523         }
 524
 525         id <<= 8;
 526
 527         /* Read Chip ID Byte 2. */
 528         id |= regval(port, 0x21);
 529
 530         /* Read chip version, only bits 3..0 for all IT87xx. */
 531         chipver = regval(port, 0x22) & 0x0f;
 532
 533         /* ID Mapping Table
 534          * unknown -> IT8711 (no datasheet)
 535          * unknown -> IT8722 (no datasheet)
 536          * 0x8702 -> IT8702
 537          * 0x8705 -> IT8700 or IT8705
 538          * 0x8708 -> IT8708
 539          * 0x8710 -> IT8710
 540          * 0x8712 -> IT8712
 541          * 0x8716 -> IT8716
 542          * 0x8718 -> IT8718
 543          * 0x8726 -> IT8726 (datasheet wrongly says 0x8716)
 544          */
 545         printf("Super I/O found at 0x%02x: id=0x%04x, chipver=0x%01x\n",
 546                port, id, chipver);
 547
 548         switch (id) {
 549         case 0x8702:
 550         case 0x8705:
 551         case 0x8708:
 552         case 0x8712:
 553         case 0x8716:
 554         case 0x8718:
 555         case 0x8726:
 556                 dump_ite(port, id);
 557                 break;
 558         default:
 559                 printf("No dump for id 0x%04x\n", id);
 560                 break;
 561         }
 562         regwrite(port, 0x02, 0x02);     /* Exit MB PnP mode. */
 563 }
 564
 565 void probe_superio(unsigned short port)
 566 {
 567         probe_idregs_simple(port);
 568         probe_idregs_fintek(port);
 569         probe_idregs_ite(port);
 570 }
 571
 572 int main(int argc, char *argv[])
 573 {
 574         if (iopl(3) < 0) {
 575                 perror("iopl");
 576                 exit(1);
 577         }
 578
 579         probe_superio(0x2e);    /* Try 0x2e. */
 580         probe_superio(0x4e);    /* Try 0x4e. */
 581
 582         return 0;
 583 }