util/superiotool/nsc.c

   1 /*
   2  * This file is part of the superiotool project.
   3  *
   4  * Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
   5  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  20  */
  21
  22 #include "superiotool.h"
  23
  24 #define CHIP_ID_REG     0x20    /* Super I/O ID (SID) / family */
  25 #define CHIP_REV_REG    0x27    /* Super I/O revision ID (SRID) */
  26
  27 const static struct superio_registers reg_table[] = {
  28         {0xd0, "PC87371", {     /* From sensors-detect */
  29                 {EOT}}},
  30         {0xdf, "PC97371", {     /* From sensors-detect */
  31                 {EOT}}},
  32         {0xe1, "PC87360", {
  33                 {EOT}}},
  34         {0xe2, "PC87351", {
  35                 {NOLDN, NULL,
  36                         {0x20,0x21,0x22,0x23,0x24,0x27,0x2e,EOT},
  37                         {0xe2,0x11,0xa1,0x00,MISC,NANA,RSVD,EOT}},
  38                 {0x0, "Floppy",
  39                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
  40                         {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
  41                 {0x1, "Parallel port",
  42                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
  43                         {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
  44                 {0x2, "COM2",
  45                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
  46                         {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
  47                 {0x3, "COM1",
  48                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
  49                         {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
  50                 {0x4, "System wake-up control (SWC)",
  51                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
  52                         {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
  53                 {0x5, "Mouse",
  54                         {0x30,0x70,0x71,0x74,0x75,EOT},
  55                         {0x00,0x0c,0x02,0x04,0x04,EOT}},
  56                 {0x6, "Keyboard",
  57                         {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
  58                          0xf0,EOT},
  59                         {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,
  60                          0x40,EOT}},
  61                 {0x7, "GPIO",
  62                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
  63                         {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,EOT}},
  64                 {0x8, "Fan speed control",
  65                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
  66                         {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}},
  67                 {EOT}}},
  68         {0xe4, "PC87364", {
  69                 {EOT}}},
  70         {0xe5, "PC87365", {     /* SRID[7..0] == chip revision */
  71                 {EOT}}},
  72         {0xe8, "PC87363", {
  73                 {EOT}}},
  74         {0xe9, "PC87366", {
  75                 {EOT}}},
  76
  77         /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */
  78         {0xea, "PC8739x", {
  79                 {EOT}}},
  80         {0xec, "PC87591x", {
  81                 /* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */
  82                 {EOT}}},
  83         {0xee, "PC8741x", {
  84                 /* SRID[7..5] is marked as "not applicable for the PC8741x". */
  85                 {EOT}}},
  86         {0xf0, "PC87372", {
  87                 {EOT}}},
  88         {0xf1, "PC8374L", {
  89                 {NOLDN, NULL,
  90                         {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
  91                          0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
  92                         {0x00,0x00,0x00,0xf1,0x11,0x00,0x00,0x00,RSVD,0x00,
  93                          MISC,RSVD,0x01,0x2e,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
  94                 {0x0, "Floppy",
  95                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf8,
  96                          EOT},
  97                         {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,0x24,
  98                          EOT}},
  99                 {0x1, "Parallel port",
 100                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf8,EOT},
 101                         {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,0x07,EOT}},
 102                 {0x2, "COM2 / IR",
 103                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
 104                         {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
 105                 {0x3, "COM1",
 106                         {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
 107                         {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
 108                 {0x4, "System wake-up control (SWC)",
 109                         {0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
 110                          EOT},
 111                         {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,
 112                          EOT}},
 113                 {0x5, "Mouse",
 114                         {0x30,0x70,0x71,0x74,0x75,EOT},
 115                         {0x00,0x0c,0x02,0x04,0x04,EOT}},
 116                 {0x6, "Keyboard",
 117                         {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
 118                          EOT},
 119                         {0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
 120                          EOT}},
 121                 {0x7, "GPIO",
 122                         {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
 123                          0xf2,0xf3,0xf8,EOT},
 124                         {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
 125                          0x00,MISC,0x01,EOT}},
 126                 {0x8, "Health management",
 127                         {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
 128                         {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}},
 129                 {EOT}}},
 130         {0xf2, "PC87427", {
 131                 /* SRID[7..5] is marked as "not applicable for the PC87427". */
 132                 {EOT}}},
 133         {0xf3, "PC87373", {
 134                 {EOT}}},
 135         {EOT}
 136 };
 137
 138 static void dump_readable_pc8374l(uint16_t port)
 139 {
 140         if (!dump_readable)
 141                 return;
 142
 143         printf("Human-readable register dump:\n");
 144
 145         printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
 146                regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
 147                regval(port, 0x24), regval(port, 0x26));
 148         printf("SMBUS at %02x\n", regval(port, 0x2a));
 149
 150         /* Check COM1. This is all we care about at present. */
 151         printf("COM 1 is globally %s\n",
 152                regval(port, 0x26) & 8 ? "disabled" : "enabled");
 153
 154         /* Select COM1. */
 155         regwrite(port, 0x07, 0x03);
 156         printf("COM 1 is locally %s\n",
 157                regval(port, 0x30) & 1 ? "enabled" : "disabled");
 158         printf
 159             ("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
 160              regval(port, 0x60), regval(port, 0x61), regval(port, 0x70),
 161              regval(port, 0x71), regval(port, 0x74), regval(port, 0x75),
 162              regval(port, 0xf0));
 163
 164         /* Select GPIO. */
 165         regwrite(port, 0x07, 0x07);
 166         printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
 167         printf
 168             ("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
 169              regval(port, 0x60), regval(port, 0x61), regval(port, 0x70),
 170              regval(port, 0x71), regval(port, 0x74), regval(port, 0x75),
 171              regval(port, 0xf0));
 172 }
 173
 174 void probe_idregs_nsc(uint16_t port)
 175 {
 176         uint8_t id, rev;
 177
 178         probing_for("NSC", "", port);
 179
 180         outb(CHIP_ID_REG, port);
 181         if (inb(port) != CHIP_ID_REG) {
 182                 if (verbose)
 183                         printf(NOTFOUND "port=0x%02x, port+1=0x%02x\n",
 184                                inb(port), inb(port + 1));
 185                 return;
 186         }
 187         id = inb(port + 1);
 188
 189         outb(CHIP_REV_REG, port);
 190         if (inb(port) != CHIP_REV_REG) {
 191                 printf("Warning: Can't get chip revision. Setting to 0xff.\n");
 192                 rev = 0xff;
 193         } else {
 194                 rev = inb(port + 1);
 195         }
 196
 197         if (superio_unknown(reg_table, id)) {
 198                 if (verbose)
 199                         printf(NOTFOUND "sid=0x%02x, srid=0x%02x\n", id, rev);
 200                 return;
 201         }
 202
 203         printf("Found NSC %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
 204                get_superio_name(reg_table, id), id, rev, port);
 205         chip_found = 1;
 206
 207         dump_superio("NSC", reg_table, port, id);
 208         if (id == 0xf1)
 209                 dump_readable_pc8374l(port);
 210 }
 211