2 * This file is part of the superiotool project.
4 * Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
5 * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include "superiotool.h"
24 #define CHIP_ID_REG 0x20 /* Super I/O ID (SID) / family */
25 #define CHIP_REV_REG 0x27 /* Super I/O revision ID (SRID) */
27 static const struct superio_registers reg_table[] = {
30 {0x20,0x21,0x22,0x23,0x24,0x27,EOT},
31 {0xcf,MISC,MISC,0x00,0x00,NANA,EOT}},
33 {0x30,0x31,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
35 {MISC,0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,
38 {0x30,0x70,0x71,0x74,0x75,EOT},
39 {0x00,0x0c,0x02,0x04,0x04,EOT}},
40 {0x2, "Real-time clock (RTC), advanced power control (APC)",
41 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
42 {MISC,0x00,0x00,0x70,0x08,0x00,0x04,0x04,EOT}},
44 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
46 {MISC,0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x20,0x00,
48 {0x4, "Parallel port",
49 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
50 {0x00,0x00,0x02,0x78,0x07,0x00,0x04,0x04,0xf2,EOT}},
52 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
53 {0x00,0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
55 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
56 {0x00,0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
58 {0x30,0x31,0x60,0x61,0x74,0x75,EOT},
59 {0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
60 {0x8, "Power management",
61 {0x30,0x31,0x60,0x61,0x74,0x75,EOT},
62 {0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
68 {0x20,0x21,0x22,0x23,0x24,0x25,0x27,EOT},
69 {0xdf,MISC,MISC,0x00,0x00,0x00,NANA,EOT}},
71 {0x30,0x31,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
73 {MISC,0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,
76 {0x30,0x70,0x71,0x74,0x75,EOT},
77 {0x00,0x0c,0x02,0x04,0x04,EOT}},
78 {0x2, "Real-time clock (RTC), advanced power control (APC)",
79 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
80 {MISC,0x00,0x00,0x70,0x08,0x00,0x04,0x04,EOT}},
82 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
84 {MISC,0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x20,0x00,
86 {0x4, "Parallel port",
87 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
88 {0x00,0x00,0x02,0x78,0x07,0x00,0x04,0x04,0xf2,EOT}},
90 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
91 {0x00,0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
93 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
94 {0x00,0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
96 {0x30,0x31,0x60,0x61,0x74,0x75,EOT},
97 {0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
98 {0x8, "Power management",
99 {0x30,0x31,0x60,0x61,0x74,0x75,EOT},
100 {0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
104 {0x20,0x21,0x22,0x27,0x2e,EOT},
105 {0xe0,MISC,0x00,NANA,RSVD,EOT}},
107 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
109 {MISC,0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x20,0x00,
111 {0x1, "Parallel port",
112 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
113 {0x00,0x00,0x02,0x78,0x07,0x00,0x04,0x04,0xf2,EOT}},
115 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
116 {0x00,0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
118 {0x30,0x31,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
119 {0x00,0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
120 {0x4, "Power management",
121 {0x30,0x31,0x60,0x61,0x74,0x75,EOT},
122 {0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
124 {0x30,0x70,0x71,0x74,0x75,EOT},
125 {0x00,0x0c,0x02,0x04,0x04,EOT}},
127 {0x30,0x31,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
129 {0x01,0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,
134 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,
135 0x2b,0x2c,0x2d,0x2e,EOT},
136 {0xe1,0x11,0x00,0x03,0x00,0x00,0x00,NANA,0x00,MISC,
137 0x00,0x00,0x00,RSVD,EOT}},
139 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
140 {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
141 {0x1, "Parallel port",
142 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
143 {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
145 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
146 {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
148 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
149 {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
150 {0x4, "System wake-up control (SWC)",
151 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
152 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
154 {0x30,0x70,0x71,0x74,0x75,EOT},
155 {0x00,0x0c,0x02,0x04,0x04,EOT}},
157 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
159 {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
162 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
164 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,0x00,
166 {0x8, "ACCESS.bus (ACB)",
167 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
168 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}},
169 {0x9, "Fan speed control and monitor (FSCM)",
170 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
171 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}},
172 {0xa, "Watchdog timer",
173 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
174 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}},
178 {0x20,0x21,0x22,0x23,0x24,0x27,0x2e,EOT},
179 {0xe2,0x11,0xa1,0x00,MISC,NANA,RSVD,EOT}},
181 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
182 {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
183 {0x1, "Parallel port",
184 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
185 {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
187 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
188 {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
190 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
191 {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
192 {0x4, "System wake-up control (SWC)",
193 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
194 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
196 {0x30,0x70,0x71,0x74,0x75,EOT},
197 {0x00,0x0c,0x02,0x04,0x04,EOT}},
199 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
201 {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,
204 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
205 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,EOT}},
206 {0x8, "Fan speed control",
207 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
208 {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}},
212 {0xe5, "PC87365", { /* SRID[7..0] == chip revision */
218 {0x20,0x21,0x22,0x23,0x24,0x25,0x27,0x28,0x2a,0x2b,
220 {0xe9,0x11,0x00,0x03,0x00,0x00,NANA,0x00,MISC,MISC,
221 0x00,MISC,RSVD,EOT}},
223 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
224 {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
225 {0x1, "Parallel port",
226 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
227 {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
229 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
230 {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
232 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
233 {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
234 {0x4, "System wake-up control (SWC)",
235 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
236 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
238 {0x30,0x70,0x71,0x74,0x75,EOT},
239 {0x00,0x0c,0x02,0x04,0x04,EOT}},
241 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
243 {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
246 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
248 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,0x00,
250 {0x8, "ACCESS.bus (ACB)",
251 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
252 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}},
253 {0x9, "Fan speed control and monitor (FSCM)",
254 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
256 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,0x00,
258 {0xa, "Watchdog timer (WDT)",
259 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
260 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}},
262 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
263 {0x00,0x02,0x00,0x00,0x03,0x04,0x04,0x00,EOT}},
265 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
266 {0x00,0x03,0x30,0x00,0x03,0x04,0x04,0x00,EOT}},
267 {0xd, "Voltage level monitor (VLM)",
268 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
269 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
270 {0xe, "Temperature sensor (TMS)",
271 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
272 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
275 /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */
279 /* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */
282 /* SRID[7..5] is marked as "not applicable for the PC8741x". */
284 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
285 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
286 {0xee,0x11,0x20,MISC,MISC,MISC,0x00,NANA,0x00,MISC,
287 0x00,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
289 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
290 {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
291 {0x1, "Parallel port",
292 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
293 {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
295 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
296 {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
298 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
299 {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
300 {0x4, "System wake-up control (SWC)",
301 {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x70,
303 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
304 0x03,0x04,0x04,EOT}},
306 {0x30,0x70,0x71,0x74,0x75,EOT},
307 {0x00,0x0c,0x02,0x04,0x04,EOT}},
309 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
311 {0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
314 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
316 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,0x01,
319 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
320 0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,
322 {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,0x00,0x00,
323 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
325 {0x10, "Real-time clock (RTC)",
326 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
328 {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x04,0x04,0x00,
329 0x00,0x00,0x00,EOT}},
335 {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
336 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
337 {0x00,0x00,0x00,0xf1,0x11,0x00,0x00,0x00,RSVD,0x00,
338 MISC,RSVD,0x01,0x2e,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
340 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf8,
342 {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,0x24,
344 {0x1, "Parallel port",
345 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf8,EOT},
346 {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,0x07,EOT}},
348 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
349 {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
351 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
352 {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
353 {0x4, "System wake-up control (SWC)",
354 {0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
356 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,
359 {0x30,0x70,0x71,0x74,0x75,EOT},
360 {0x00,0x0c,0x02,0x04,0x04,EOT}},
362 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
364 {0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
367 {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
369 {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
370 0x00,MISC,0x01,EOT}},
371 {0x8, "Health management",
372 {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
373 {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}},
376 /* SRID[7..5] is marked as "not applicable for the PC87427". */
383 void probe_idregs_nsc(uint16_t port)
387 probing_for("NSC", "", port);
389 outb(CHIP_ID_REG, port);
390 if (inb(port) != CHIP_ID_REG) {
392 printf(NOTFOUND "port=0x%02x, port+1=0x%02x\n",
393 inb(port), inb(port + 1));
398 outb(CHIP_REV_REG, port);
399 if (inb(port) != CHIP_REV_REG) {
400 printf("Warning: Can't get chip revision. Setting to 0xff.\n");
406 if (superio_unknown(reg_table, id)) {
408 printf(NOTFOUND "sid=0x%02x, srid=0x%02x\n", id, rev);
412 printf("Found NSC %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
413 get_superio_name(reg_table, id), id, rev, port);
416 dump_superio("NSC", reg_table, port, id);