8 typedef unsigned char uint8_t;
9 typedef signed char int8_t;
11 typedef unsigned short uint16_t;
12 typedef signed short int16_t;
14 typedef unsigned int uint32_t;
15 typedef signed int int32_t;
23 typedef unsigned char uint_least8_t;
24 typedef signed char int_least8_t;
26 typedef unsigned short uint_least16_t;
27 typedef signed short int_least16_t;
29 typedef unsigned int uint_least32_t;
30 typedef signed int int_least32_t;
38 typedef unsigned char uint_fast8_t;
39 typedef signed char int_fast8_t;
41 typedef unsigned int uint_fast16_t;
42 typedef signed int int_fast16_t;
44 typedef unsigned int uint_fast32_t;
45 typedef signed int int_fast32_t;
54 typedef unsigned int uintptr_t;
61 typedef long int intmax_t;
62 typedef unsigned long int uintmax_t;
67 static void outb(unsigned char value, unsigned short port)
69 __builtin_outb(value, port);
72 static void outw(unsigned short value, unsigned short port)
74 __builtin_outw(value, port);
77 static void outl(unsigned int value, unsigned short port)
79 __builtin_outl(value, port);
83 static unsigned char inb(unsigned short port)
85 return __builtin_inb(port);
89 static unsigned char inw(unsigned short port)
91 return __builtin_inw(port);
94 static unsigned char inl(unsigned short port)
96 return __builtin_inl(port);
112 return __builtin_bsr(value);
116 typedef __builtin_msr_t msr_t;
118 static msr_t rdmsr(unsigned long index)
120 return __builtin_rdmsr(index);
123 static void wrmsr(unsigned long index, msr_t msr)
125 __builtin_wrmsr(index, msr.lo, msr.hi);
128 typedef unsigned device_t;
130 static unsigned char pci_read_config8(device_t dev, unsigned where)
134 outl(0x80000000 | (addr & ~3), 0xCF8);
135 return inb(0xCFC + (addr & 3));
138 static unsigned short pci_read_config16(device_t dev, unsigned where)
142 outl(0x80000000 | (addr & ~3), 0xCF8);
143 return inw(0xCFC + (addr & 2));
146 static unsigned int pci_read_config32(device_t dev, unsigned where)
150 outl(0x80000000 | (addr & ~3), 0xCF8);
154 static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
158 outl(0x80000000 | (addr & ~3), 0xCF8);
159 outb(value, 0xCFC + (addr & 3));
162 static void pci_write_config16(device_t dev, unsigned where, unsigned short value)
166 outl(0x80000000 | (addr & ~3), 0xCF8);
167 outw(value, 0xCFC + (addr & 2));
170 static void pci_write_config32(device_t dev, unsigned where, unsigned int value)
174 outl(0x80000000 | (addr & ~3), 0xCF8);
179 static device_t pci_locate_device(unsigned pci_id, device_t dev)
181 for(; dev <= ( (((255) & 0xFF) << 16) | (((31) & 0x1f) << 11) | (((7) & 0x7) << 8)); dev += ( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((1) & 0x7) << 8))) {
183 id = pci_read_config32(dev, 0);
188 return (0xffffffffU);
195 static int uart_can_tx_byte(void)
197 return inb(0x3f8 + 0x05) & 0x20;
200 static void uart_wait_to_tx_byte(void)
202 while(!uart_can_tx_byte())
206 static void uart_wait_until_sent(void)
208 while(!(inb(0x3f8 + 0x05) & 0x40))
212 static void uart_tx_byte(unsigned char data)
214 uart_wait_to_tx_byte();
215 outb(data, 0x3f8 + 0x00);
217 uart_wait_until_sent();
220 static void uart_init(void)
223 outb(0x0, 0x3f8 + 0x01);
225 outb(0x01, 0x3f8 + 0x02);
227 outb(0x80 | 0x3, 0x3f8 + 0x03);
229 outb((115200/115200) & 0xFF, 0x3f8 + 0x00);
230 outb(((115200/115200) >> 8) & 0xFF, 0x3f8 + 0x01);
232 outb(0x3, 0x3f8 + 0x03);
239 static void __console_tx_byte(unsigned char byte)
244 static void __console_tx_nibble(unsigned nibble)
247 digit = nibble + '0';
251 __console_tx_byte(digit);
254 static void __console_tx_char(int loglevel, unsigned char byte)
261 static void __console_tx_hex8(int loglevel, unsigned char value)
264 __console_tx_nibble((value >> 4U) & 0x0fU);
265 __console_tx_nibble(value & 0x0fU);
269 static void __console_tx_hex16(int loglevel, unsigned short value)
272 __console_tx_nibble((value >> 12U) & 0x0fU);
273 __console_tx_nibble((value >> 8U) & 0x0fU);
274 __console_tx_nibble((value >> 4U) & 0x0fU);
275 __console_tx_nibble(value & 0x0fU);
279 static void __console_tx_hex32(int loglevel, unsigned int value)
282 __console_tx_nibble((value >> 28U) & 0x0fU);
283 __console_tx_nibble((value >> 24U) & 0x0fU);
284 __console_tx_nibble((value >> 20U) & 0x0fU);
285 __console_tx_nibble((value >> 16U) & 0x0fU);
286 __console_tx_nibble((value >> 12U) & 0x0fU);
287 __console_tx_nibble((value >> 8U) & 0x0fU);
288 __console_tx_nibble((value >> 4U) & 0x0fU);
289 __console_tx_nibble(value & 0x0fU);
293 static void __console_tx_string(int loglevel, const char *str)
297 while((ch = *str++) != '\0') {
298 __console_tx_byte(ch);
303 static void print_emerg_char(unsigned char byte) { __console_tx_char(0, byte); }
304 static void print_emerg_hex8(unsigned char value){ __console_tx_hex8(0, value); }
305 static void print_emerg_hex16(unsigned short value){ __console_tx_hex16(0, value); }
306 static void print_emerg_hex32(unsigned int value) { __console_tx_hex32(0, value); }
307 static void print_emerg(const char *str) { __console_tx_string(0, str); }
309 static void print_alert_char(unsigned char byte) { __console_tx_char(1, byte); }
310 static void print_alert_hex8(unsigned char value) { __console_tx_hex8(1, value); }
311 static void print_alert_hex16(unsigned short value){ __console_tx_hex16(1, value); }
312 static void print_alert_hex32(unsigned int value) { __console_tx_hex32(1, value); }
313 static void print_alert(const char *str) { __console_tx_string(1, str); }
315 static void print_crit_char(unsigned char byte) { __console_tx_char(2, byte); }
316 static void print_crit_hex8(unsigned char value) { __console_tx_hex8(2, value); }
317 static void print_crit_hex16(unsigned short value){ __console_tx_hex16(2, value); }
318 static void print_crit_hex32(unsigned int value) { __console_tx_hex32(2, value); }
319 static void print_crit(const char *str) { __console_tx_string(2, str); }
321 static void print_err_char(unsigned char byte) { __console_tx_char(3, byte); }
322 static void print_err_hex8(unsigned char value) { __console_tx_hex8(3, value); }
323 static void print_err_hex16(unsigned short value){ __console_tx_hex16(3, value); }
324 static void print_err_hex32(unsigned int value) { __console_tx_hex32(3, value); }
325 static void print_err(const char *str) { __console_tx_string(3, str); }
327 static void print_warning_char(unsigned char byte) { __console_tx_char(4, byte); }
328 static void print_warning_hex8(unsigned char value) { __console_tx_hex8(4, value); }
329 static void print_warning_hex16(unsigned short value){ __console_tx_hex16(4, value); }
330 static void print_warning_hex32(unsigned int value) { __console_tx_hex32(4, value); }
331 static void print_warning(const char *str) { __console_tx_string(4, str); }
333 static void print_notice_char(unsigned char byte) { __console_tx_char(5, byte); }
334 static void print_notice_hex8(unsigned char value) { __console_tx_hex8(5, value); }
335 static void print_notice_hex16(unsigned short value){ __console_tx_hex16(5, value); }
336 static void print_notice_hex32(unsigned int value) { __console_tx_hex32(5, value); }
337 static void print_notice(const char *str) { __console_tx_string(5, str); }
339 static void print_info_char(unsigned char byte) { __console_tx_char(6, byte); }
340 static void print_info_hex8(unsigned char value) { __console_tx_hex8(6, value); }
341 static void print_info_hex16(unsigned short value){ __console_tx_hex16(6, value); }
342 static void print_info_hex32(unsigned int value) { __console_tx_hex32(6, value); }
343 static void print_info(const char *str) { __console_tx_string(6, str); }
345 static void print_debug_char(unsigned char byte) { __console_tx_char(7, byte); }
346 static void print_debug_hex8(unsigned char value) { __console_tx_hex8(7, value); }
347 static void print_debug_hex16(unsigned short value){ __console_tx_hex16(7, value); }
348 static void print_debug_hex32(unsigned int value) { __console_tx_hex32(7, value); }
349 static void print_debug(const char *str) { __console_tx_string(7, str); }
351 static void print_spew_char(unsigned char byte) { __console_tx_char(8, byte); }
352 static void print_spew_hex8(unsigned char value) { __console_tx_hex8(8, value); }
353 static void print_spew_hex16(unsigned short value){ __console_tx_hex16(8, value); }
354 static void print_spew_hex32(unsigned int value) { __console_tx_hex32(8, value); }
355 static void print_spew(const char *str) { __console_tx_string(8, str); }
357 static void console_init(void)
359 static const char console_test[] =
364 "Thu Jun 19 05:42:16 MDT 2003"
366 print_info(console_test);
370 static void die(const char *str)
386 static void write_phys(unsigned long addr, unsigned long value)
392 : "r" (addr), "r" (value)
402 static unsigned long read_phys(unsigned long addr)
404 volatile unsigned long *ptr;
409 static void ram_fill(unsigned long start, unsigned long stop)
415 print_debug("DRAM fill: ");
416 print_debug_hex32(start);
418 print_debug_hex32(stop);
420 for(addr = start; addr < stop ; addr += 4) {
422 if (!(addr & 0xffff)) {
423 print_debug_hex32(addr);
426 write_phys(addr, addr);
429 print_debug_hex32(addr);
430 print_debug("\r\nDRAM filled\r\n");
433 static void ram_verify(unsigned long start, unsigned long stop)
439 print_debug("DRAM verify: ");
440 print_debug_hex32(start);
441 print_debug_char('-');
442 print_debug_hex32(stop);
444 for(addr = start; addr < stop ; addr += 4) {
447 if (!(addr & 0xffff)) {
448 print_debug_hex32(addr);
451 value = read_phys(addr);
454 print_err_hex32(addr);
456 print_err_hex32(value);
461 print_debug_hex32(addr);
462 print_debug("\r\nDRAM verified\r\n");
466 void ram_check(unsigned long start, unsigned long stop)
474 print_debug("Testing DRAM : ");
475 print_debug_hex32(start);
477 print_debug_hex32(stop);
479 ram_fill(start, stop);
480 ram_verify(start, stop);
481 print_debug("Done.\n");
485 static void enumerate_ht_chain(void)
492 unsigned next_unitid, last_unitid;;
496 uint8_t hdr_type, pos;
497 last_unitid = next_unitid;
499 id = pci_read_config32(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), 0x00);
501 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
502 (((id >> 16) & 0xffff) == 0xffff) ||
503 (((id >> 16) & 0xffff) == 0x0000)) {
506 hdr_type = pci_read_config8(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), 0x0e);
510 if ((hdr_type == 0) ||
512 pos = pci_read_config8(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), 0x34);
516 cap = pci_read_config8(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), pos + 0);
519 flags = pci_read_config16(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), pos + 2);
520 if ((flags >> 13) == 0) {
523 flags |= next_unitid & 0x1f;
524 count = (flags >> 5) & 0x1f;
525 pci_write_config16(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), pos + 2, flags);
526 next_unitid += count;
530 pos = pci_read_config8(( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8)), pos + 1);
532 } while((last_unitid != next_unitid) && (next_unitid <= 0x1f));
537 static void enable_smbus(void)
540 dev = pci_locate_device(((((0x746b) & 0xFFFF) << 16) | ((0x1022) & 0xFFFF)), 0);
541 if (dev == (0xffffffffU)) {
542 die("SMBUS controller not found\r\n");
545 print_debug("SMBus controller enabled\r\n");
546 pci_write_config32(dev, 0x58, 0x1000 | 1);
547 enable = pci_read_config8(dev, 0x41);
548 pci_write_config8(dev, 0x41, enable | (1 << 7));
552 static inline void smbus_delay(void)
557 static int smbus_wait_until_ready(void)
560 loops = (100*1000*10);
564 val = inw(0x1000 + 0xe0);
565 if ((val & 0x800) == 0) {
572 static int smbus_wait_until_done(void)
575 loops = (100*1000*10);
580 val = inw(0x1000 + 0xe0);
581 if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
588 static int smbus_read_byte(unsigned device, unsigned address)
590 unsigned char global_control_register;
591 unsigned char global_status_register;
594 if (smbus_wait_until_ready() < 0) {
600 outw(inw(0x1000 + 0xe2) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x1000 + 0xe2);
602 outw(((device & 0x7f) << 1) | 1, 0x1000 + 0xe4);
604 outb(address & 0xFF, 0x1000 + 0xe8);
606 outw((inw(0x1000 + 0xe2) & ~7) | (0x2), 0x1000 + 0xe2);
610 outw(inw(0x1000 + 0xe0), 0x1000 + 0xe0);
613 outw(0, 0x1000 + 0xe6);
616 outw((inw(0x1000 + 0xe2) | (1 << 3)), 0x1000 + 0xe2);
620 if (smbus_wait_until_done() < 0) {
624 global_status_register = inw(0x1000 + 0xe0);
627 byte = inw(0x1000 + 0xe6) & 0xff;
629 if (global_status_register != (1 << 4)) {
649 static void setup_resource_map(const unsigned int *register_values, int max)
652 print_debug("setting up resource map....\r\n");
653 for(i = 0; i < max; i += 3) {
663 dev = register_values[i] & ~0xff;
664 where = register_values[i] & 0xff;
665 reg = pci_read_config32(dev, where);
666 reg &= register_values[i+1];
667 reg |= register_values[i+2];
668 pci_write_config32(dev, where, reg);
676 print_debug("done.\r\n");
679 static void setup_default_resource_map(void)
681 static const unsigned int register_values[] = {
683 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x44) & 0xFF)), 0x0000f8f8, 0x00000000,
684 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x4C) & 0xFF)), 0x0000f8f8, 0x00000001,
685 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x54) & 0xFF)), 0x0000f8f8, 0x00000002,
686 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x5C) & 0xFF)), 0x0000f8f8, 0x00000003,
687 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x64) & 0xFF)), 0x0000f8f8, 0x00000004,
688 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x6C) & 0xFF)), 0x0000f8f8, 0x00000005,
689 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x74) & 0xFF)), 0x0000f8f8, 0x00000006,
690 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x7C) & 0xFF)), 0x0000f8f8, 0x00000007,
692 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x40) & 0xFF)), 0x0000f8fc, 0x00000000,
693 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x48) & 0xFF)), 0x0000f8fc, 0x00000000,
694 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x50) & 0xFF)), 0x0000f8fc, 0x00000000,
695 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x58) & 0xFF)), 0x0000f8fc, 0x00000000,
696 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x60) & 0xFF)), 0x0000f8fc, 0x00000000,
697 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x68) & 0xFF)), 0x0000f8fc, 0x00000000,
698 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x70) & 0xFF)), 0x0000f8fc, 0x00000000,
699 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x78) & 0xFF)), 0x0000f8fc, 0x00000000,
701 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x84) & 0xFF)), 0x00000048, 0x00000000,
702 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x8C) & 0xFF)), 0x00000048, 0x00000000,
703 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x94) & 0xFF)), 0x00000048, 0x00000000,
704 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x9C) & 0xFF)), 0x00000048, 0x00000000,
705 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xA4) & 0xFF)), 0x00000048, 0x00000000,
706 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xAC) & 0xFF)), 0x00000048, 0x00000000,
707 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xB4) & 0xFF)), 0x00000048, 0x00000000,
708 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xBC) & 0xFF)), 0x00000048, 0x00000000,
710 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x80) & 0xFF)), 0x000000f0, 0x00000000,
711 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x88) & 0xFF)), 0x000000f0, 0x00000000,
712 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x90) & 0xFF)), 0x000000f0, 0x00000000,
713 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x98) & 0xFF)), 0x000000f0, 0x00000000,
714 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xA0) & 0xFF)), 0x000000f0, 0x00000000,
715 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xA8) & 0xFF)), 0x000000f0, 0x00000000,
716 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xB0) & 0xFF)), 0x000000f0, 0x00000000,
717 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xB8) & 0xFF)), 0x000000f0, 0x00000000,
719 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xC4) & 0xFF)), 0xFE000FC8, 0x01fff000,
720 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xCC) & 0xFF)), 0xFE000FC8, 0x00000000,
721 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xD4) & 0xFF)), 0xFE000FC8, 0x00000000,
722 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xDC) & 0xFF)), 0xFE000FC8, 0x00000000,
724 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xC0) & 0xFF)), 0xFE000FCC, 0x00000003,
725 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xC8) & 0xFF)), 0xFE000FCC, 0x00000000,
726 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xD0) & 0xFF)), 0xFE000FCC, 0x00000000,
727 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xD8) & 0xFF)), 0xFE000FCC, 0x00000000,
729 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xE0) & 0xFF)), 0x0000FC88, 0xff000003,
730 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xE4) & 0xFF)), 0x0000FC88, 0x00000000,
731 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xE8) & 0xFF)), 0x0000FC88, 0x00000000,
732 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xEC) & 0xFF)), 0x0000FC88, 0x00000000,
735 max = sizeof(register_values)/sizeof(register_values[0]);
736 setup_resource_map(register_values, max);
739 static void sdram_set_registers(void)
741 static const unsigned int register_values[] = {
743 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x44) & 0xFF)), 0x0000f8f8, 0x003f0000,
744 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x4C) & 0xFF)), 0x0000f8f8, 0x00000001,
746 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x54) & 0xFF)), 0x0000f8f8, 0x00000002,
747 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x5C) & 0xFF)), 0x0000f8f8, 0x00000003,
748 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x64) & 0xFF)), 0x0000f8f8, 0x00000004,
749 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x6C) & 0xFF)), 0x0000f8f8, 0x00000005,
750 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x74) & 0xFF)), 0x0000f8f8, 0x00000006,
751 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x7C) & 0xFF)), 0x0000f8f8, 0x00000007,
753 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x40) & 0xFF)), 0x0000f8fc, 0x00000003,
755 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x48) & 0xFF)), 0x0000f8fc, 0x00400000,
756 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x50) & 0xFF)), 0x0000f8fc, 0x00400000,
757 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x58) & 0xFF)), 0x0000f8fc, 0x00400000,
758 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x60) & 0xFF)), 0x0000f8fc, 0x00400000,
759 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x68) & 0xFF)), 0x0000f8fc, 0x00400000,
760 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x70) & 0xFF)), 0x0000f8fc, 0x00400000,
761 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x78) & 0xFF)), 0x0000f8fc, 0x00400000,
763 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x84) & 0xFF)), 0x00000048, 0x00e1ff00,
764 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x8C) & 0xFF)), 0x00000048, 0x00dfff00,
765 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x94) & 0xFF)), 0x00000048, 0x00e3ff00,
766 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x9C) & 0xFF)), 0x00000048, 0x00000000,
767 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xA4) & 0xFF)), 0x00000048, 0x00000000,
768 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xAC) & 0xFF)), 0x00000048, 0x00000000,
769 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xB4) & 0xFF)), 0x00000048, 0x00000b00,
770 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xBC) & 0xFF)), 0x00000048, 0x00fe0b00,
772 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x80) & 0xFF)), 0x000000f0, 0x00e00003,
773 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x88) & 0xFF)), 0x000000f0, 0x00d80003,
774 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x90) & 0xFF)), 0x000000f0, 0x00e20003,
775 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0x98) & 0xFF)), 0x000000f0, 0x00000000,
776 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xA0) & 0xFF)), 0x000000f0, 0x00000000,
777 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xA8) & 0xFF)), 0x000000f0, 0x00000000,
778 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xB0) & 0xFF)), 0x000000f0, 0x00000a03,
781 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xB8) & 0xFF)), 0x000000f0, 0x00400003,
783 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xC4) & 0xFF)), 0xFE000FC8, 0x0000d000,
784 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xCC) & 0xFF)), 0xFE000FC8, 0x000ff000,
785 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xD4) & 0xFF)), 0xFE000FC8, 0x00000000,
786 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xDC) & 0xFF)), 0xFE000FC8, 0x00000000,
788 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xC0) & 0xFF)), 0xFE000FCC, 0x0000d003,
789 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xC8) & 0xFF)), 0xFE000FCC, 0x00001013,
790 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xD0) & 0xFF)), 0xFE000FCC, 0x00000000,
791 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xD8) & 0xFF)), 0xFE000FCC, 0x00000000,
793 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xE0) & 0xFF)), 0x0000FC88, 0xff000003,
794 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xE4) & 0xFF)), 0x0000FC88, 0x00000000,
795 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xE8) & 0xFF)), 0x0000FC88, 0x00000000,
796 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) | ((0xEC) & 0xFF)), 0x0000FC88, 0x00000000,
798 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x40) & 0xFF)), 0x001f01fe, 0x00000000,
799 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x44) & 0xFF)), 0x001f01fe, 0x00000000,
800 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x48) & 0xFF)), 0x001f01fe, 0x00000000,
801 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x4C) & 0xFF)), 0x001f01fe, 0x00000000,
803 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x50) & 0xFF)), 0x001f01fe, 0x00000000,
804 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x54) & 0xFF)), 0x001f01fe, 0x00000000,
805 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x58) & 0xFF)), 0x001f01fe, 0x00000000,
806 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x5C) & 0xFF)), 0x001f01fe, 0x00000000,
808 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x60) & 0xFF)), 0xC01f01ff, 0x00000000,
809 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x64) & 0xFF)), 0xC01f01ff, 0x00000000,
810 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x68) & 0xFF)), 0xC01f01ff, 0x00000000,
811 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x6C) & 0xFF)), 0xC01f01ff, 0x00000000,
813 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x70) & 0xFF)), 0xC01f01ff, 0x00000000,
814 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x74) & 0xFF)), 0xC01f01ff, 0x00000000,
815 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x78) & 0xFF)), 0xC01f01ff, 0x00000000,
816 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x7C) & 0xFF)), 0xC01f01ff, 0x00000000,
818 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x80) & 0xFF)), 0xffff8888, 0x00000000,
820 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x88) & 0xFF)), 0xe8088008, 0x03623125,
822 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x8c) & 0xFF)), 0xff8fe08e, 0x00000930,
824 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x90) & 0xFF)), 0xf0000000,
826 (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
827 (1 << 19)|(1 << 18)|(0 << 17)|(0 << 16)|
828 (2 << 14)|(0 << 13)|(0 << 12)|
829 (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|
830 (0 << 3) |(0 << 1) |(0 << 0),
832 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x94) & 0xFF)), 0xc180f0f0, 0x0e2b0a05,
834 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x07) << 8) | ((0x98) & 0xFF)), 0xfc00ffff, 0x00000000,
836 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((3) & 0x07) << 8) | ((0x58) & 0xFF)), 0xffe0e0e0, 0x00000000,
838 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((3) & 0x07) << 8) | ((0x5C) & 0xFF)), 0x0000003e, 0x00000000,
844 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((3) & 0x07) << 8) | ((0x60) & 0xFF)), 0xffffff00, 0x00000000,
848 print_debug("setting up CPU0 northbridge registers\r\n");
849 max = sizeof(register_values)/sizeof(register_values[0]);
850 for(i = 0; i < max; i += 3) {
860 dev = register_values[i] & ~0xff;
861 where = register_values[i] & 0xff;
862 reg = pci_read_config32(dev, where);
863 reg &= register_values[i+1];
864 reg |= register_values[i+2];
865 pci_write_config32(dev, where, reg);
874 print_debug("done.\r\n");
882 static struct dimm_size spd_get_dimm_size(unsigned device)
894 value = smbus_read_byte(device, 3);
895 if (value < 0) return sz;
896 sz.side1 += value & 0xf;
898 value = smbus_read_byte(device, 4);
899 if (value < 0) return sz;
900 sz.side1 += value & 0xf;
902 value = smbus_read_byte(device, 17);
903 if (value < 0) return sz;
904 sz.side1 += log2(value & 0xff);
907 value = smbus_read_byte(device, 7);
908 if (value < 0) return sz;
912 low = smbus_read_byte(device, 6);
913 if (low < 0) return sz;
914 value = value | (low & 0xff);
915 sz.side1 += log2(value);
918 value = smbus_read_byte(device, 5);
919 if (value <= 1) return sz;
924 value = smbus_read_byte(device, 3);
925 if (value < 0) return sz;
926 if ((value & 0xf0) == 0) return sz;
927 sz.side2 -= (value & 0x0f);
928 sz.side2 += ((value >> 4) & 0x0f);
930 value = smbus_read_byte(device, 4);
931 if (value < 0) return sz;
932 sz.side2 -= (value & 0x0f);
933 sz.side2 += ((value >> 4) & 0x0f);
937 static unsigned spd_to_dimm(unsigned device)
939 return (device - (0xa << 3));
942 static void set_dimm_size(struct dimm_size sz, unsigned index)
944 uint32_t base0, base1, map;
947 print_debug("set_dimm_size: (");
948 print_debug_hex32(sz.side1);
949 print_debug_char(',');
950 print_debug_hex32(sz.side2);
951 print_debug_char(',');
952 print_debug_hex32(index);
953 print_debug(")\r\n");
955 if (sz.side1 != sz.side2) {
958 map = pci_read_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x80);
959 map &= ~(0xf << (index + 4));
970 if (sz.side1 >= (25 + 3)) {
971 base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
972 map |= (sz.side1 - (25 + 3)) << (index *4);
976 if (sz.side2 >= (25 + 3)) {
977 base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
981 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x40 + (((index << 1)+0)<<2), base0);
982 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x40 + (((index << 1)+1)<<2), base1);
983 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x80, map);
986 static void spd_set_ram_size(void)
989 for(device = (0xa << 3);
990 device <= ((0xa << 3) +1);
994 sz = spd_get_dimm_size(device);
995 set_dimm_size(sz, spd_to_dimm(device));
999 static void set_top_mem(unsigned tom_k)
1007 msr.lo = (tom_k & 0x003fffff) << 10;
1008 msr.hi = (tom_k & 0xffc00000) >> 22;
1009 wrmsr(0xC001001A, msr);
1019 static void order_dimms(void)
1030 uint32_t csbase, csmask;
1034 for(index = 0; index < 8; index++) {
1036 value = pci_read_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x40 + (index << 2));
1044 if (value <= csbase) {
1049 if (tom & (1 << (index + 24))) {
1062 tom |= (1 << (canidate + 24));
1065 size = csbase >> 21;
1068 csbase = (tom << 21) | 1;
1074 csmask = ((size -1) << 21);
1078 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x40 + (canidate << 2), csbase);
1080 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x60 + (canidate << 2), csmask);
1083 set_top_mem((tom & ~0xff000000) << 15);
1086 static void spd_set_dram_timing(void)
1091 static void spd_set_ecc_mode(void)
1094 dcl = pci_read_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x90);
1097 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x90, dcl);
1100 static void sdram_set_spd_registers(void)
1103 spd_set_dram_timing();
1109 static void sdram_enable(void)
1114 dcl = pci_read_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x90);
1115 print_debug("dcl: ");
1116 print_debug_hex32(dcl);
1117 print_debug("\r\n");
1119 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x90, dcl);
1125 pci_write_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x90, dcl);
1127 print_debug("Initializing memory: ");
1130 dcl = pci_read_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)), 0x90);
1132 if ((loops & 1023) == 0) {
1135 } while(((dcl & (1<<8)) != 0) && (loops < 300000));
1136 if (loops >= 300000) {
1137 print_debug(" failed\r\n");
1139 print_debug(" done\r\n");
1144 static void sdram_first_normal_reference(void) {}
1145 static void sdram_enable_refresh(void) {}
1146 static void sdram_special_finishup(void) {}
1149 static void setup_coherent_ht_domain(void)
1151 static const unsigned int register_values[] = {
1153 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x40) & 0xFF)), 0xfff0f0f0, 0x00010101,
1154 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x44) & 0xFF)), 0xfff0f0f0, 0x00010101,
1155 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x48) & 0xFF)), 0xfff0f0f0, 0x00010101,
1156 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x4c) & 0xFF)), 0xfff0f0f0, 0x00010101,
1157 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x50) & 0xFF)), 0xfff0f0f0, 0x00010101,
1158 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x54) & 0xFF)), 0xfff0f0f0, 0x00010101,
1159 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x58) & 0xFF)), 0xfff0f0f0, 0x00010101,
1160 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x5c) & 0xFF)), 0xfff0f0f0, 0x00010101,
1162 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x68) & 0xFF)), 0x00800000, 0x0f00840f,
1164 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x6C) & 0xFF)), 0xffffff8c, 0x00000000 | (1 << 6) |(1 << 5)| (1 << 4),
1166 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x84) & 0xFF)), 0x00009c05, 0x11110020,
1168 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x88) & 0xFF)), 0xfffff0ff, 0x00000200,
1170 ( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) | ((0x94) & 0xFF)), 0xff000000, 0x00ff0000,
1179 print_debug("setting up coherent ht domain....\r\n");
1180 max = sizeof(register_values)/sizeof(register_values[0]);
1181 for(i = 0; i < max; i += 3) {
1191 dev = register_values[i] & ~0xff;
1192 where = register_values[i] & 0xff;
1193 reg = pci_read_config32(dev, where);
1194 reg &= register_values[i+1];
1195 reg |= register_values[i+2];
1196 pci_write_config32(dev, where, reg);
1204 print_debug("done.\r\n");
1208 void sdram_no_memory(void)
1210 print_err("No memory!!\r\n");
1217 void sdram_initialize(void)
1219 print_debug("Ram1\r\n");
1221 sdram_set_registers();
1223 print_debug("Ram2\r\n");
1225 sdram_set_spd_registers();
1227 print_debug("Ram3\r\n");
1234 print_debug("Ram4\r\n");
1235 sdram_first_normal_reference();
1237 print_debug("Ram5\r\n");
1238 sdram_enable_refresh();
1239 sdram_special_finishup();
1241 print_debug("Ram6\r\n");
1245 static int boot_cpu(void)
1247 volatile unsigned long *local_apic;
1248 unsigned long apic_id;
1252 bsp = !!(msr.lo & (1 << 8));
1254 print_debug("Bootstrap processor\r\n");
1256 print_debug("Application processor\r\n");
1262 static int cpu_init_detected(void)
1269 htic = pci_read_config32(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x7) << 8)), 0x6c);
1271 cpu_init = (htic & (1<<6));
1273 print_debug("CPU INIT Detected.\r\n");
1279 static void print_debug_pci_dev(unsigned dev)
1281 print_debug("PCI: ");
1282 print_debug_hex8((dev >> 16) & 0xff);
1283 print_debug_char(':');
1284 print_debug_hex8((dev >> 11) & 0x1f);
1285 print_debug_char('.');
1286 print_debug_hex8((dev >> 8) & 7);
1289 static void print_pci_devices(void)
1292 for(dev = ( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((0) & 0x7) << 8));
1293 dev <= ( (((0) & 0xFF) << 16) | (((0x1f) & 0x1f) << 11) | (((0x7) & 0x7) << 8));
1294 dev += ( (((0) & 0xFF) << 16) | (((0) & 0x1f) << 11) | (((1) & 0x7) << 8))) {
1296 id = pci_read_config32(dev, 0x00);
1297 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
1298 (((id >> 16) & 0xffff) == 0xffff) ||
1299 (((id >> 16) & 0xffff) == 0x0000)) {
1302 print_debug_pci_dev(dev);
1303 print_debug("\r\n");
1308 static void dump_pci_device(unsigned dev)
1311 print_debug_pci_dev(dev);
1312 print_debug("\r\n");
1314 for(i = 0; i <= 255; i++) {
1316 if ((i & 0x0f) == 0) {
1317 print_debug_hex8(i);
1318 print_debug_char(':');
1320 val = pci_read_config8(dev, i);
1321 print_debug_char(' ');
1322 print_debug_hex8(val);
1323 if ((i & 0x0f) == 0x0f) {
1324 print_debug("\r\n");
1329 static void dump_spd_registers(void)
1332 device = (0xa << 3);
1333 print_debug("\r\n");
1334 while(device <= ((0xa << 3) +1)) {
1336 print_debug("dimm: ");
1337 print_debug_hex8(device);
1338 for(i = 0; i < 256; i++) {
1341 if ((i & 0xf) == 0) {
1342 print_debug("\r\n");
1343 print_debug_hex8(i);
1346 status = smbus_read_byte(device, i);
1348 print_debug("bad device\r\n");
1351 byte = status & 0xff;
1352 print_debug_hex8(byte);
1353 print_debug_char(' ');
1356 print_debug("\r\n");
1361 static void main(void)
1372 if (boot_cpu() && !cpu_init_detected()) {
1373 setup_default_resource_map();
1374 setup_coherent_ht_domain();
1375 enumerate_ht_chain();
1376 print_pci_devices();
1380 dump_spd_registers();
1381 dump_pci_device(( (((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((2) & 0x7) << 8)));
1385 msr = rdmsr(0xC001001A);
1386 print_debug("TOP_MEM: ");
1387 print_debug_hex32(msr.hi);
1388 print_debug_hex32(msr.lo);
1389 print_debug("\r\n");
1390 ram_check(0x00000000, msr.lo);