2 * inteltool - dump all registers on an Intel CPU + chipset based system.
4 * Copyright (C) 2008-2010 by coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #if defined(__GLIBC__)
25 #if (defined(__MACH__) && defined(__APPLE__))
26 /* DirectIO is available here: http://www.coresystems.de/en/directio */
28 #include <DirectIO/darwinio.h>
32 #define INTELTOOL_VERSION "1.0"
34 /* Tested chipsets: */
35 #define PCI_VENDOR_ID_INTEL 0x8086
36 #define PCI_DEVICE_ID_INTEL_ICH 0x2410
37 #define PCI_DEVICE_ID_INTEL_ICH0 0x2420
38 #define PCI_DEVICE_ID_INTEL_ICH2 0x2440
39 #define PCI_DEVICE_ID_INTEL_ICH4 0x24c0
40 #define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc
41 #define PCI_DEVICE_ID_INTEL_ICH6 0x2640
42 #define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0
43 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
44 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
45 #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
46 #define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
47 #define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912
48 #define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914
49 #define PCI_DEVICE_ID_INTEL_ICH9R 0x2916
50 #define PCI_DEVICE_ID_INTEL_ICH9 0x2918
51 #define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
52 #define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
53 #define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
54 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119
56 #define PCI_DEVICE_ID_INTEL_82810 0x7120
57 #define PCI_DEVICE_ID_INTEL_82810DC 0x7122
58 #define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124
59 #define PCI_DEVICE_ID_INTEL_82830M 0x3575
60 #define PCI_DEVICE_ID_INTEL_82845 0x1a30
61 #define PCI_DEVICE_ID_INTEL_82915 0x2580
62 #define PCI_DEVICE_ID_INTEL_82945P 0x2770
63 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
64 #define PCI_DEVICE_ID_INTEL_PM965 0x2a00
65 #define PCI_DEVICE_ID_INTEL_Q965 0x2990
66 #define PCI_DEVICE_ID_INTEL_82975X 0x277c
67 #define PCI_DEVICE_ID_INTEL_82Q35 0x29b0
68 #define PCI_DEVICE_ID_INTEL_82G33 0x29c0
69 #define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
70 #define PCI_DEVICE_ID_INTEL_GS45 0x2a40
71 #define PCI_DEVICE_ID_INTEL_X58 0x3405
72 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
73 #define PCI_DEVICE_ID_INTEL_ATOM_DXXX 0xa000
75 /* untested, but almost identical to D-series */
76 #define PCI_DEVICE_ID_INTEL_ATOM_NXXX 0xa010
78 #define PCI_DEVICE_ID_INTEL_82443LX 0x7180
79 /* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
80 #define PCI_DEVICE_ID_INTEL_82443BX 0x7190
81 #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP 0x7192
83 /* 82371AB/EB/MB use the same device ID value. */
84 #define PCI_DEVICE_ID_INTEL_82371XX 0x7110
86 #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
89 typedef struct { uint32_t hi, lo; } msr_t;
91 typedef struct { uint16_t addr; int size; char *name; } io_register_t;
93 void *map_physical(unsigned long phys_addr, size_t len);
94 void unmap_physical(void *virt_addr, size_t len);
96 unsigned int cpuid(unsigned int op);
97 int print_intel_core_msrs(void);
98 int print_mchbar(struct pci_dev *nb);
99 int print_pmbase(struct pci_dev *sb);
100 int print_rcba(struct pci_dev *sb);
101 int print_gpios(struct pci_dev *sb);
102 int print_epbar(struct pci_dev *nb);
103 int print_dmibar(struct pci_dev *nb);
104 int print_pciexbar(struct pci_dev *nb);