1 #ifndef ARCH_PIRQ_ROUTING_H
2 #define ARCH_PIRQ_ROUTING_H
6 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
7 #define PIRQ_VERSION 0x0100
10 uint8_t bus, devfn; /* Bus, device and function */
12 uint8_t link; /* IRQ line ID, chipset dependent, 0=not routed */
13 uint16_t bitmap; /* Available IRQs */
14 } __attribute__((packed)) irq[4];
15 uint8_t slot; /* Slot number, 0=onboard */
17 } __attribute__((packed));
19 #if defined(CONFIG_IRQ_SLOT_COUNT)
20 #define IRQ_SLOTS_COUNT CONFIG_IRQ_SLOT_COUNT
22 #define IRQ_SLOTS_COUNT 1
24 #define IRQ_SLOTS_COUNT
27 struct irq_routing_table {
28 uint32_t signature; /* PIRQ_SIGNATURE should be here */
29 uint16_t version; /* PIRQ_VERSION */
30 uint16_t size; /* Table size in bytes */
31 uint8_t rtr_bus, rtr_devfn; /* Where the interrupt router lies */
32 uint16_t exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
33 uint16_t rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
34 uint32_t miniport_data; /* Miniport data */
36 uint8_t checksum; /* Modulo 256 checksum must give zero */
37 struct irq_info slots[IRQ_SLOTS_COUNT];
38 } __attribute__((packed));
40 extern const struct irq_routing_table intel_irq_routing_table;
43 #define copy_pirq_routing_table(start) (start)
44 unsigned long write_pirq_routing_table(unsigned long start);
46 #if CONFIG_HAVE_PIRQ_TABLE==1
47 unsigned long copy_pirq_routing_table(unsigned long start);
48 unsigned long write_pirq_routing_table(unsigned long start);
50 #define copy_pirq_routing_table(start) (start)
51 #define write_pirq_routing_table(start) (start)
55 #endif /* ARCH_PIRQ_ROUTING_H */