2 * This file is part of the flashrom project.
4 * Copyright (C) 2008 Peter Stuge <peter@stuge.se>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
27 #define WBSIO_PORT1 0x2e
28 #define WBSIO_PORT2 0x4e
30 static uint16_t wbsio_spibase = 0;
32 static uint16_t wbsio_get_spibase(uint16_t port) {
34 uint16_t flashport = 0;
36 w836xx_ext_enter(port);
37 id = wbsio_read(port, 0x20);
39 fprintf(stderr, "\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
43 if (0 == (wbsio_read(port, 0x24) & 2)) {
44 fprintf(stderr, "\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
48 wbsio_write(port, 0x07, 0x06);
49 if (0 == (wbsio_read(port, 0x30) & 1)) {
50 fprintf(stderr, "\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
54 flashport = (wbsio_read(port, 0x62) << 8) | wbsio_read(port, 0x63);
57 w836xx_ext_leave(port);
61 int wbsio_check_for_spi(const char *name) {
62 if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1)))
63 if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2)))
66 printf_debug("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
67 flashbus = BUS_TYPE_WBSIO_SPI;
71 /* W83627DHG has 11 command modes:
73 * 2=1 command+1 data write
74 * 3=1 command+2 data read
75 * 4=1 command+3 address
76 * 5=1 command+3 address+1 data write
77 * 6=1 command+3 address+4 data write
78 * 7=1 command+3 address+1 dummy address inserted by wbsio+4 data read
79 * 8=1 command+3 address+1 data read
80 * 9=1 command+3 address+2 data read
81 * a=1 command+3 address+3 data read
82 * b=1 command+3 address+4 data read
84 * mode[7:4] holds the command mode
85 * mode[3:0] holds SPI address bits [19:16]
87 * The Winbond SPI master only supports 20 bit addresses on the SPI bus. :\
88 * Would one more byte of RAM in the chip (to get all 24 bits) really make
89 * such a big difference?
91 int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) {
95 printf_debug("%s:", __func__);
97 if (1 == writecnt && 0 == readcnt) {
99 } else if (2 == writecnt && 0 == readcnt) {
100 OUTB(writearr[1], wbsio_spibase + 4);
101 printf_debug(" data=0x%02x", writearr[1]);
103 } else if (1 == writecnt && 2 == readcnt) {
105 } else if (4 == writecnt && 0 == readcnt) {
106 printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
107 for (i = 2; i < writecnt; i++) {
108 OUTB(writearr[i], wbsio_spibase + i);
109 printf_debug("%02x", writearr[i]);
111 mode = 0x40 | (writearr[1] & 0x0f);
112 } else if (5 == writecnt && 0 == readcnt) {
113 printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
114 for (i = 2; i < 4; i++) {
115 OUTB(writearr[i], wbsio_spibase + i);
116 printf_debug("%02x", writearr[i]);
118 OUTB(writearr[i], wbsio_spibase + i);
119 printf_debug(" data=0x%02x", writearr[i]);
120 mode = 0x50 | (writearr[1] & 0x0f);
121 } else if (8 == writecnt && 0 == readcnt) {
122 printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
123 for (i = 2; i < 4; i++) {
124 OUTB(writearr[i], wbsio_spibase + i);
125 printf_debug("%02x", writearr[i]);
127 printf_debug(" data=0x");
128 for (; i < writecnt; i++) {
129 OUTB(writearr[i], wbsio_spibase + i);
130 printf_debug("%02x", writearr[i]);
132 mode = 0x60 | (writearr[1] & 0x0f);
133 } else if (5 == writecnt && 4 == readcnt) {
134 /* XXX: TODO not supported by flashrom infrastructure!
135 * This mode, 7, discards the fifth byte in writecnt,
136 * but since we can not express that in flashrom, fail
137 * the operation for now.
140 } else if (4 == writecnt && readcnt >= 1 && readcnt <= 4) {
141 printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
142 for (i = 2; i < writecnt; i++) {
143 OUTB(writearr[i], wbsio_spibase + i);
144 printf_debug("%02x", writearr[i]);
146 mode = ((7 + readcnt) << 4) | (writearr[1] & 0x0f);
148 printf_debug(" cmd=%02x mode=%02x\n", writearr[0], mode);
151 fprintf(stderr, "%s: unsupported command type wr=%d rd=%d\n",
152 __func__, writecnt, readcnt);
156 OUTB(writearr[0], wbsio_spibase);
157 OUTB(mode, wbsio_spibase + 1);
163 printf_debug("%s: returning data =", __func__);
164 for (i = 0; i < readcnt; i++) {
165 readarr[i] = INB(wbsio_spibase + 4 + i);
166 printf_debug(" 0x%02x", readarr[i]);
172 int wbsio_spi_read(struct flashchip *flash, uint8_t *buf) {
173 int size = flash->total_size * 1024;
175 if (flash->total_size > 1024) {
176 fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
180 memcpy(buf, (const char *)flash->virtual_memory, size);
184 int wbsio_spi_write(struct flashchip *flash, uint8_t *buf) {
185 int pos, size = flash->total_size * 1024;
187 if (flash->total_size > 1024) {
188 fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
194 for (pos = 0; pos < size; pos++) {
195 spi_byte_program(pos, buf[pos]);
196 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)