2 * This file is part of the flashrom project.
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
26 #if defined(__GLIBC__)
34 #include <machine/cpufunc.h>
37 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
38 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
39 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
40 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
41 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
42 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
52 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
57 /* With 32bit manufacture_id and model_id we can cover IDs up to
58 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
59 * Identification code.
61 uint32_t manufacture_id;
67 /* Indicate if flashrom has been tested with this flash chip and if
68 * everything worked correctly.
72 int (*probe) (struct flashchip *flash);
73 int (*erase) (struct flashchip *flash);
74 int (*write) (struct flashchip *flash, uint8_t *buf);
75 int (*read) (struct flashchip *flash, uint8_t *buf);
77 /* Some flash devices have an additional register space. */
78 volatile uint8_t *virtual_memory;
79 volatile uint8_t *virtual_registers;
82 #define TEST_UNTESTED 0
84 #define TEST_OK_PROBE (1<<0)
85 #define TEST_OK_READ (1<<1)
86 #define TEST_OK_ERASE (1<<2)
87 #define TEST_OK_WRITE (1<<3)
88 #define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
89 #define TEST_OK_MASK 0x0f
91 #define TEST_BAD_PROBE (1<<4)
92 #define TEST_BAD_READ (1<<5)
93 #define TEST_BAD_ERASE (1<<6)
94 #define TEST_BAD_WRITE (1<<7)
95 #define TEST_BAD_MASK 0xf0
97 extern struct flashchip flashchips[];
100 * Please keep this list sorted alphabetically by manufacturer. The first
101 * entry of each section should be the manufacturer ID, followed by the
102 * list of devices from that manufacturer (sorted by device IDs).
104 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
106 * All SPI parts have 16-bit device IDs.
109 #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
111 #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
113 #define AMD_ID 0x01 /* AMD */
114 #define AM_29F040B 0xA4
115 #define AM_29LV040B 0x4F
116 #define AM_29F016D 0xAD
118 #define AMIC_ID 0x7F37 /* AMIC */
119 #define AMIC_ID_NOPREFIX 0x37 /* AMIC */
120 #define AMIC_A25L40P 0x2013
122 #define ASD_ID 0x25 /* ASD, not listed in JEP106W */
123 #define ASD_AE49F2008 0x52
125 #define ATMEL_ID 0x1F /* Atmel */
126 #define AT_25DF021 0x4300
127 #define AT_25DF041A 0x4401
128 #define AT_25DF081 0x4502
129 #define AT_25DF161 0x4602
130 #define AT_25DF321 0x4700 /* also 26DF321 */
131 #define AT_25DF321A 0x4701
132 #define AT_25DF641 0x4800
133 #define AT_26DF041 0x4400
134 #define AT_26DF081 0x4500 /* guessed, no datasheet available */
135 #define AT_26DF081A 0x4501
136 #define AT_26DF161 0x4600
137 #define AT_26DF161A 0x4601
138 #define AT_29C040A 0xA4
139 #define AT_29C020 0xDA
140 #define AT_49F002N 0x07 /* for AT49F002(N) */
141 #define AT_49F002NT 0x08 /* for AT49F002(N)T */
143 #define CATALYST_ID 0x31 /* Catalyst */
145 #define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage*/
146 #define EMST_F49B002UA 0x00
149 * EN25 chips are SPI, first byte of device ID is memory type,
150 * second byte of device ID is log(bitsize)-9.
151 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
152 * is the continuation code for IDs in bank 2.
153 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
154 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
155 * Let's hope they are not manufacturing SPI flash chips as well.
157 #define EON_ID 0x7F1C /* EON Silicon Devices */
158 #define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
159 #define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
160 #define EN_25B10 0x2011
161 #define EN_25B20 0x2012
162 #define EN_25B40 0x2013
163 #define EN_25B80 0x2014
164 #define EN_25B16 0x2015
165 #define EN_25B32 0x2016
166 #define EN_29F512 0x7F21
167 #define EN_29F010 0x7F20
168 #define EN_29F040A 0x7F04
169 #define EN_29LV010 0x7F6E
170 #define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
171 #define EN_29F002T 0x7F92
172 #define EN_29F002B 0x7F97
174 #define FUJITSU_ID 0x04 /* Fujitsu */
175 /* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
176 * try to read it from a location not mentioned in the data sheet.
178 #define MBM29F400TC_STRANGE 0x23
179 #define MBM29F400BC 0x7B
180 #define MBM29F400TC 0x77
182 #define HYUNDAI_ID 0xAD /* Hyundai */
184 #define IMT_ID 0x7F1F /* Integrated Memory Technologies */
185 #define IM_29F004B 0xAE
186 #define IM_29F004T 0xAF
188 #define INTEL_ID 0x89 /* Intel */
190 #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
192 #define MSYSTEMS_ID 0x156F /* M-Systems, not listed in JEP106W */
193 #define MSYSTEMS_MD2200 0xDB
194 #define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
195 #define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
198 * MX25 chips are SPI, first byte of device ID is memory type,
199 * second byte of device ID is log(bitsize)-9.
200 * Generalplus SPI chips seem to be compatible with Macronix
201 * and use the same set of IDs.
203 #define MX_ID 0xC2 /* Macronix (MX) */
204 #define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
205 #define MX_25L1005 0x2011
206 #define MX_25L2005 0x2012
207 #define MX_25L4005 0x2013 /* MX25L4005{,A} */
208 #define MX_25L8005 0x2014
209 #define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
210 #define MX_25L3205 0x2016 /* MX25L3205{,A} */
211 #define MX_25L6405 0x2017 /* MX25L3205{,D} */
212 #define MX_25L1635D 0x2415
213 #define MX_25L3235D 0x2416
214 #define MX_29F002 0xB0
216 /* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
217 * a 0x7F continuation code prefix.
219 #define PMC_ID 0x7F9D /* PMC */
220 #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
221 #define PMC_25LV512 0x7B
222 #define PMC_25LV010 0x7C
223 #define PMC_25LV020 0x7D
224 #define PMC_25LV040 0x7E
225 #define PMC_25LV080B 0x13
226 #define PMC_25LV016B 0x14
227 #define PMC_39LV512 0x1B
228 #define PMC_39F010 0x1C /* also Pm39LV010 */
229 #define PMC_39LV020 0x3D
230 #define PMC_39LV040 0x3E
231 #define PMC_39F020 0x4D
232 #define PMC_39F040 0x4E
233 #define PMC_49FL002 0x6D
234 #define PMC_49FL004 0x6E
236 #define SHARP_ID 0xB0 /* Sharp */
237 #define SHARP_LHF00L04 0xCF
240 * Spansion was previously a joint venture of AMD and Fujitsu.
241 * S25 chips are SPI. The first device ID byte is memory type and
242 * the second device ID byte is memory capacity.
244 #define SPANSION_ID 0x01 /* Spansion */
245 #define SPANSION_S25FL016A 0x0214
248 * SST25 chips are SPI, first byte of device ID is memory type, second
249 * byte of device ID is related to log(bitsize) at least for some chips.
251 #define SST_ID 0xBF /* SST */
252 #define SST_25WF512 0x2501
253 #define SST_25WF010 0x2502
254 #define SST_25WF020 0x2503
255 #define SST_25WF040 0x2504
256 #define SST_25VF016B 0x2541
257 #define SST_25VF032B 0x254A
258 #define SST_25VF040B 0x258D
259 #define SST_25VF080B 0x258E
260 #define SST_27SF512 0xA4
261 #define SST_27SF010 0xA5
262 #define SST_27SF020 0xA6
263 #define SST_27VF010 0xA9
264 #define SST_27VF020 0xAA
265 #define SST_28SF040 0x04
266 #define SST_29EE512 0x5D
267 #define SST_29EE010 0x07
268 #define SST_29LE010 0x08 /* also SST29VE010 */
269 #define SST_29EE020A 0x10
270 #define SST_29LE020 0x12 /* also SST29VE020 */
271 #define SST_29SF020 0x24
272 #define SST_29VF020 0x25
273 #define SST_29SF040 0x13
274 #define SST_29VF040 0x14
275 #define SST_39SF010 0xB5
276 #define SST_39SF020 0xB6
277 #define SST_39SF040 0xB7
278 #define SST_39VF512 0xD4
279 #define SST_39VF010 0xD5
280 #define SST_39VF020 0xD6
281 #define SST_39VF040 0xD7
282 #define SST_49LF040B 0x50
283 #define SST_49LF040 0x51
284 #define SST_49LF020A 0x52
285 #define SST_49LF080A 0x5B
286 #define SST_49LF002A 0x57
287 #define SST_49LF003A 0x1B
288 #define SST_49LF004A 0x60
289 #define SST_49LF008A 0x5A
290 #define SST_49LF004C 0x54
291 #define SST_49LF008C 0x59
292 #define SST_49LF016C 0x5C
293 #define SST_49LF160C 0x4C
296 * ST25P chips are SPI, first byte of device ID is memory type, second
297 * byte of device ID is related to log(bitsize) at least for some chips.
299 #define ST_ID 0x20 /* ST / SGS/Thomson */
300 #define ST_M25P05A 0x2010
301 #define ST_M25P10A 0x2011
302 #define ST_M25P20 0x2012
303 #define ST_M25P40 0x2013
304 #define ST_M25P40_RES 0x12
305 #define ST_M25P80 0x2014
306 #define ST_M25P16 0x2015
307 #define ST_M25P32 0x2016
308 #define ST_M25P64 0x2017
309 #define ST_M25P128 0x2018
310 #define ST_M50FLW040A 0x08
311 #define ST_M50FLW040B 0x28
312 #define ST_M50FLW080A 0x80
313 #define ST_M50FLW080B 0x81
314 #define ST_M50FW040 0x2C
315 #define ST_M50FW080 0x2D
316 #define ST_M50FW016 0x2E
317 #define ST_M50LPW116 0x30
318 #define ST_M29F002B 0x34
319 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
320 #define ST_M29F400BT 0xD5
321 #define ST_M29F040B 0xE2
322 #define ST_M29W010B 0x23
323 #define ST_M29W040B 0xE3
325 #define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
326 #define S29C51001T 0x01
327 #define S29C51002T 0x02
328 #define S29C51004T 0x03
329 #define S29C31004T 0x63
331 #define TI_ID 0x97 /* Texas Instruments */
334 * W25X chips are SPI, first byte of device ID is memory type, second
335 * byte of device ID is related to log(bitsize).
337 #define WINBOND_ID 0xDA /* Winbond */
338 #define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
339 #define W_25X10 0x3011
340 #define W_25X20 0x3012
341 #define W_25X40 0x3013
342 #define W_25X80 0x3014
343 #define W_29C011 0xC1
344 #define W_29C020C 0x45
345 #define W_29C040P 0x46
346 #define W_29EE011 0xC1
347 #define W_39V040FA 0x34
348 #define W_39V040A 0x3D
349 #define W_39V040B 0x54
350 #define W_39V080A 0xD0
351 #define W_39V080FA 0xD3
352 #define W_39V080FA_DM 0x93
353 #define W_49F002U 0x0B
354 #define W_49V002A 0xB0
355 #define W_49V002FA 0x32
358 void myusec_delay(int time);
359 void myusec_calibrate_delay();
361 /* PCI handling for board/chipset_enable */
362 struct pci_access *pacc;
363 struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
364 struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
365 uint16_t card_vendor, uint16_t card_device);
369 int board_flash_enable(const char *vendor, const char *part);
370 void print_supported_boards(void);
372 /* chipset_enable.c */
373 int chipset_flash_enable(void);
374 void print_supported_chipsets(void);
375 extern int ich9_detected;
376 extern void *ich_spibar;
378 /* Physical memory mapping device */
379 #if defined (__sun) && (defined(__i386) || defined(__amd64))
380 # define MEM_DEV "/dev/xsvc"
382 # define MEM_DEV "/dev/mem"
389 #define printf_debug(x...) { if (verbose) printf(x); }
392 int map_flash_registers(struct flashchip *flash);
395 int show_id(uint8_t *bios, int size);
396 int read_romlayout(char *name);
397 int find_romentry(char *name);
398 int handle_romentries(uint8_t *buffer, uint8_t *content);
401 int coreboot_init(void);
402 extern char *lb_part, *lb_vendor;
405 int probe_spi_rdid(struct flashchip *flash);
406 int probe_spi_res(struct flashchip *flash);
407 int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
408 void spi_write_enable();
409 void spi_write_disable();
410 int spi_chip_erase_c7(struct flashchip *flash);
411 int spi_chip_write(struct flashchip *flash, uint8_t *buf);
412 int spi_chip_read(struct flashchip *flash, uint8_t *buf);
413 uint8_t spi_read_status_register();
414 void spi_disable_blockprotect(void);
415 void spi_byte_program(int address, uint8_t byte);
416 void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
417 void spi_nbyte_read(int address, uint8_t *bytes, int len);
420 int probe_82802ab(struct flashchip *flash);
421 int erase_82802ab(struct flashchip *flash);
422 int write_82802ab(struct flashchip *flash, uint8_t *buf);
425 int probe_29f040b(struct flashchip *flash);
426 int erase_29f040b(struct flashchip *flash);
427 int write_29f040b(struct flashchip *flash, uint8_t *buf);
430 int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
431 int ich_spi_read(struct flashchip *flash, uint8_t * buf);
432 int ich_spi_write(struct flashchip *flash, uint8_t * buf);
435 extern uint16_t it8716f_flashport;
436 int it87xx_probe_spi_flash(const char *name);
437 int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
438 int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
439 int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
440 void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
443 uint8_t oddparity(uint8_t val);
444 void toggle_ready_jedec(volatile uint8_t *dst);
445 void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
446 void unprotect_jedec(volatile uint8_t *bios);
447 void protect_jedec(volatile uint8_t *bios);
448 int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
449 volatile uint8_t *dst);
450 int probe_jedec(struct flashchip *flash);
451 int erase_chip_jedec(struct flashchip *flash);
452 int write_jedec(struct flashchip *flash, uint8_t *buf);
453 int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
454 int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
455 int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
456 volatile uint8_t *dst, unsigned int page_size);
459 int probe_m29f400bt(struct flashchip *flash);
460 int erase_m29f400bt(struct flashchip *flash);
461 int block_erase_m29f400bt(volatile uint8_t *bios,
462 volatile uint8_t *dst);
463 int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
464 int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
465 void toggle_ready_m29f400bt(volatile uint8_t *dst);
466 void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
467 void protect_m29f400bt(volatile uint8_t *bios);
468 void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
469 volatile uint8_t *dst, int page_size);
472 int probe_29f002(struct flashchip *flash);
473 int erase_29f002(struct flashchip *flash);
474 int write_29f002(struct flashchip *flash, uint8_t *buf);
477 int probe_49fl00x(struct flashchip *flash);
478 int erase_49fl00x(struct flashchip *flash);
479 int write_49fl00x(struct flashchip *flash, uint8_t *buf);
481 /* sharplhf00l04.c */
482 int probe_lhf00l04(struct flashchip *flash);
483 int erase_lhf00l04(struct flashchip *flash);
484 int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
485 void toggle_ready_lhf00l04(volatile uint8_t *dst);
486 void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
487 void protect_lhf00l04(volatile uint8_t *bios);
490 int probe_28sf040(struct flashchip *flash);
491 int erase_28sf040(struct flashchip *flash);
492 int write_28sf040(struct flashchip *flash, uint8_t *buf);
495 int probe_39sf020(struct flashchip *flash);
496 int write_39sf020(struct flashchip *flash, uint8_t *buf);
499 int erase_49lf040(struct flashchip *flash);
500 int write_49lf040(struct flashchip *flash, uint8_t *buf);
503 int probe_49lfxxxc(struct flashchip *flash);
504 int erase_49lfxxxc(struct flashchip *flash);
505 int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
508 int probe_sst_fwhub(struct flashchip *flash);
509 int erase_sst_fwhub(struct flashchip *flash);
510 int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
513 int probe_winbond_fwhub(struct flashchip *flash);
514 int erase_winbond_fwhub(struct flashchip *flash);
515 int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
518 int probe_w29ee011(struct flashchip *flash);
521 int write_49f002(struct flashchip *flash, uint8_t *buf);
524 int probe_stm50flw0x0x(struct flashchip *flash);
525 int erase_stm50flw0x0x(struct flashchip *flash);
526 int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
528 #endif /* !__FLASH_H__ */