2 * This file is part of the flashrom project.
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
26 #if defined(__GLIBC__)
34 #include <machine/cpufunc.h>
37 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
38 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
39 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
40 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
41 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
42 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
52 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
58 * With 32bit manufacture_id and model_id we can cover IDs up to
59 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
60 * Identification code.
62 uint32_t manufacture_id;
69 * Indicate if flashrom has been tested with this flash chip and if
70 * everything worked correctly.
74 int (*probe) (struct flashchip *flash);
75 int (*erase) (struct flashchip *flash);
76 int (*write) (struct flashchip *flash, uint8_t *buf);
77 int (*read) (struct flashchip *flash, uint8_t *buf);
79 /* Some flash devices have an additional register space. */
80 volatile uint8_t *virtual_memory;
81 volatile uint8_t *virtual_registers;
84 #define TEST_UNTESTED 0
86 #define TEST_OK_PROBE (1<<0)
87 #define TEST_OK_READ (1<<1)
88 #define TEST_OK_ERASE (1<<2)
89 #define TEST_OK_WRITE (1<<3)
90 #define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ)
91 #define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
92 #define TEST_OK_MASK 0x0f
94 #define TEST_BAD_PROBE (1<<4)
95 #define TEST_BAD_READ (1<<5)
96 #define TEST_BAD_ERASE (1<<6)
97 #define TEST_BAD_WRITE (1<<7)
98 #define TEST_BAD_MASK 0xf0
100 extern struct flashchip flashchips[];
103 * Please keep this list sorted alphabetically by manufacturer. The first
104 * entry of each section should be the manufacturer ID, followed by the
105 * list of devices from that manufacturer (sorted by device IDs).
107 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
109 * All SPI parts have 16-bit device IDs.
112 #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
114 #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
116 #define AMD_ID 0x01 /* AMD */
117 #define AM_29F002BT 0xB0
118 #define AM_29F002BB 0x34
119 #define AM_29F040B 0xA4
120 #define AM_29LV040B 0x4F
121 #define AM_29F016D 0xAD
123 #define AMIC_ID 0x7F37 /* AMIC */
124 #define AMIC_ID_NOPREFIX 0x37 /* AMIC */
125 #define AMIC_A25L40P 0x2013
126 #define AMIC_A29002B 0x0d
127 #define AMIC_A29002T 0x8c
128 #define AMIC_A29040B 0x86
129 #define AMIC_A49LF040A 0x9d
131 #define ASD_ID 0x25 /* ASD, not listed in JEP106W */
132 #define ASD_AE49F2008 0x52
134 #define ATMEL_ID 0x1F /* Atmel */
135 #define AT_25DF021 0x4300
136 #define AT_25DF041A 0x4401
137 #define AT_25DF081 0x4502
138 #define AT_25DF161 0x4602
139 #define AT_25DF321 0x4700 /* also 26DF321 */
140 #define AT_25DF321A 0x4701
141 #define AT_25DF641 0x4800
142 #define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
143 #define AT_25F512B 0x6500
144 #define AT_25FS010 0x6601
145 #define AT_25FS040 0x6604
146 #define AT_26DF041 0x4400
147 #define AT_26DF081 0x4500 /* guessed, no datasheet available */
148 #define AT_26DF081A 0x4501
149 #define AT_26DF161 0x4600
150 #define AT_26DF161A 0x4601
151 #define AT_26DF321 0x4700 /* also 25DF321 */
152 #define AT_26F004 0x0400
153 #define AT_29C040A 0xA4
154 #define AT_29C020 0xDA
155 #define AT_45BR3214B /* No ID available */
156 #define AT_45CS1282 0x2920
157 #define AT_45D011 /* No ID available */
158 #define AT_45D021A /* No ID available */
159 #define AT_45D041A /* No ID available */
160 #define AT_45D081A /* No ID available */
161 #define AT_45D161 /* No ID available */
162 #define AT_45DB011 /* No ID available */
163 #define AT_45DB011B /* No ID available */
164 #define AT_45DB011D 0x2200
165 #define AT_45DB021A /* No ID available */
166 #define AT_45DB021B /* No ID available */
167 #define AT_45DB021D 0x2300
168 #define AT_45DB041A /* No ID available */
169 #define AT_45DB041D 0x2400
170 #define AT_45DB081A /* No ID available */
171 #define AT_45DB081D 0x2500
172 #define AT_45DB161 /* No ID available */
173 #define AT_45DB161B /* No ID available */
174 #define AT_45DB161D 0x2600
175 #define AT_45DB321 /* No ID available */
176 #define AT_45DB321B /* No ID available */
177 #define AT_45DB321C 0x2700
178 #define AT_45DB321D 0x2701 /* Buggy data sheet */
179 #define AT_45DB642 /* No ID available */
180 #define AT_45DB642D 0x2800
181 #define AT_49F002N 0x07 /* for AT49F002(N) */
182 #define AT_49F002NT 0x08 /* for AT49F002(N)T */
184 #define CATALYST_ID 0x31 /* Catalyst */
186 #define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
187 #define EMST_F49B002UA 0x00
190 * EN25 chips are SPI, first byte of device ID is memory type,
191 * second byte of device ID is log(bitsize)-9.
192 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
193 * is the continuation code for IDs in bank 2.
194 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
195 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
196 * Let's hope they are not manufacturing SPI flash chips as well.
198 #define EON_ID 0x7F1C /* EON Silicon Devices */
199 #define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
200 #define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
201 #define EN_25B10 0x2011
202 #define EN_25B20 0x2012
203 #define EN_25B40 0x2013
204 #define EN_25B80 0x2014
205 #define EN_25B16 0x2015
206 #define EN_25B32 0x2016
207 #define EN_29F512 0x7F21
208 #define EN_29F010 0x7F20
209 #define EN_29F040A 0x7F04
210 #define EN_29LV010 0x7F6E
211 #define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
212 #define EN_29F002T 0x7F92
213 #define EN_29F002B 0x7F97
215 #define FUJITSU_ID 0x04 /* Fujitsu */
216 #define MBM29F400BC 0xAB
217 #define MBM29F400TC 0x23
218 #define MBM29F004BC 0x7B
219 #define MBM29F004TC 0x77
221 #define HYUNDAI_ID 0xAD /* Hyundai */
223 #define IMT_ID 0x7F1F /* Integrated Memory Technologies */
224 #define IM_29F004B 0xAE
225 #define IM_29F004T 0xAF
227 #define INTEL_ID 0x89 /* Intel */
229 #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
232 * MX25 chips are SPI, first byte of device ID is memory type,
233 * second byte of device ID is log(bitsize)-9.
234 * Generalplus SPI chips seem to be compatible with Macronix
235 * and use the same set of IDs.
237 #define MX_ID 0xC2 /* Macronix (MX) */
238 #define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
239 #define MX_25L1005 0x2011
240 #define MX_25L2005 0x2012
241 #define MX_25L4005 0x2013 /* MX25L4005{,A} */
242 #define MX_25L8005 0x2014
243 #define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
244 #define MX_25L3205 0x2016 /* MX25L3205{,A} */
245 #define MX_25L6405 0x2017 /* MX25L3205{,D} */
246 #define MX_25L1635D 0x2415
247 #define MX_25L3235D 0x2416
248 #define MX_29F002B 0x34
249 #define MX_29F002T 0xB0
252 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
253 * have a 0x7F continuation code prefix.
255 #define PMC_ID 0x7F9D /* PMC */
256 #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
257 #define PMC_25LV512 0x7B
258 #define PMC_25LV010 0x7C
259 #define PMC_25LV020 0x7D
260 #define PMC_25LV040 0x7E
261 #define PMC_25LV080B 0x13
262 #define PMC_25LV016B 0x14
263 #define PMC_39LV512 0x1B
264 #define PMC_39F010 0x1C /* also Pm39LV010 */
265 #define PMC_39LV020 0x3D
266 #define PMC_39LV040 0x3E
267 #define PMC_39F020 0x4D
268 #define PMC_39F040 0x4E
269 #define PMC_49FL002 0x6D
270 #define PMC_49FL004 0x6E
272 #define SHARP_ID 0xB0 /* Sharp */
273 #define SHARP_LHF00L04 0xCF
276 * Spansion was previously a joint venture of AMD and Fujitsu.
277 * S25 chips are SPI. The first device ID byte is memory type and
278 * the second device ID byte is memory capacity.
280 #define SPANSION_ID 0x01 /* Spansion */
281 #define SPANSION_S25FL016A 0x0214
284 * SST25 chips are SPI, first byte of device ID is memory type, second
285 * byte of device ID is related to log(bitsize) at least for some chips.
287 #define SST_ID 0xBF /* SST */
288 #define SST_25WF512 0x2501
289 #define SST_25WF010 0x2502
290 #define SST_25WF020 0x2503
291 #define SST_25WF040 0x2504
292 #define SST_25VF016B 0x2541
293 #define SST_25VF032B 0x254A
294 #define SST_25VF040B 0x258D
295 #define SST_25VF080B 0x258E
296 #define SST_27SF512 0xA4
297 #define SST_27SF010 0xA5
298 #define SST_27SF020 0xA6
299 #define SST_27VF010 0xA9
300 #define SST_27VF020 0xAA
301 #define SST_28SF040 0x04
302 #define SST_29EE512 0x5D
303 #define SST_29EE010 0x07
304 #define SST_29LE010 0x08 /* also SST29VE010 */
305 #define SST_29EE020A 0x10
306 #define SST_29LE020 0x12 /* also SST29VE020 */
307 #define SST_29SF020 0x24
308 #define SST_29VF020 0x25
309 #define SST_29SF040 0x13
310 #define SST_29VF040 0x14
311 #define SST_39SF010 0xB5
312 #define SST_39SF020 0xB6
313 #define SST_39SF040 0xB7
314 #define SST_39VF512 0xD4
315 #define SST_39VF010 0xD5
316 #define SST_39VF020 0xD6
317 #define SST_39VF040 0xD7
318 #define SST_49LF040B 0x50
319 #define SST_49LF040 0x51
320 #define SST_49LF020A 0x52
321 #define SST_49LF080A 0x5B
322 #define SST_49LF002A 0x57
323 #define SST_49LF003A 0x1B
324 #define SST_49LF004A 0x60
325 #define SST_49LF008A 0x5A
326 #define SST_49LF004C 0x54
327 #define SST_49LF008C 0x59
328 #define SST_49LF016C 0x5C
329 #define SST_49LF160C 0x4C
332 * ST25P chips are SPI, first byte of device ID is memory type, second
333 * byte of device ID is related to log(bitsize) at least for some chips.
335 #define ST_ID 0x20 /* ST / SGS/Thomson */
336 #define ST_M25P05A 0x2010
337 #define ST_M25P10A 0x2011
338 #define ST_M25P20 0x2012
339 #define ST_M25P40 0x2013
340 #define ST_M25P40_RES 0x12
341 #define ST_M25P80 0x2014
342 #define ST_M25P16 0x2015
343 #define ST_M25P32 0x2016
344 #define ST_M25P64 0x2017
345 #define ST_M25P128 0x2018
346 #define ST_M50FLW040A 0x08
347 #define ST_M50FLW040B 0x28
348 #define ST_M50FLW080A 0x80
349 #define ST_M50FLW080B 0x81
350 #define ST_M50FW002 0x29
351 #define ST_M50FW040 0x2C
352 #define ST_M50FW080 0x2D
353 #define ST_M50FW016 0x2E
354 #define ST_M50LPW116 0x30
355 #define ST_M29F002B 0x34
356 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
357 #define ST_M29F400BT 0xD5
358 #define ST_M29F040B 0xE2
359 #define ST_M29W010B 0x23
360 #define ST_M29W040B 0xE3
362 #define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
363 #define S29C51001T 0x01
364 #define S29C51002T 0x02
365 #define S29C51004T 0x03
366 #define S29C31004T 0x63
368 #define TI_ID 0x97 /* Texas Instruments */
371 * W25X chips are SPI, first byte of device ID is memory type, second
372 * byte of device ID is related to log(bitsize).
374 #define WINBOND_ID 0xDA /* Winbond */
375 #define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
376 #define W_25X10 0x3011
377 #define W_25X20 0x3012
378 #define W_25X40 0x3013
379 #define W_25X80 0x3014
380 #define W_29C011 0xC1
381 #define W_29C020C 0x45
382 #define W_29C040P 0x46
383 #define W_29EE011 0xC1
384 #define W_39V040FA 0x34
385 #define W_39V040A 0x3D
386 #define W_39V040B 0x54
387 #define W_39V080A 0xD0
388 #define W_39V080FA 0xD3
389 #define W_39V080FA_DM 0x93
390 #define W_49F002U 0x0B
391 #define W_49V002A 0xB0
392 #define W_49V002FA 0x32
395 void myusec_delay(int time);
396 void myusec_calibrate_delay();
398 /* PCI handling for board/chipset_enable */
399 struct pci_access *pacc;
400 struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
401 struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
402 uint16_t card_vendor, uint16_t card_device);
405 int board_flash_enable(const char *vendor, const char *part);
406 void print_supported_boards(void);
408 /* chipset_enable.c */
409 int chipset_flash_enable(void);
410 void print_supported_chipsets(void);
420 extern flashbus_t flashbus;
423 /* Physical memory mapping device */
424 #if defined (__sun) && (defined(__i386) || defined(__amd64))
425 # define MEM_DEV "/dev/xsvc"
427 # define MEM_DEV "/dev/mem"
434 #define printf_debug(x...) { if (verbose) printf(x); }
437 int map_flash_registers(struct flashchip *flash);
440 int show_id(uint8_t *bios, int size, int force);
441 int read_romlayout(char *name);
442 int find_romentry(char *name);
443 int handle_romentries(uint8_t *buffer, uint8_t *content);
446 int coreboot_init(void);
447 extern char *lb_part, *lb_vendor;
450 int probe_spi_rdid(struct flashchip *flash);
451 int probe_spi_rdid4(struct flashchip *flash);
452 int probe_spi_rems(struct flashchip *flash);
453 int probe_spi_res(struct flashchip *flash);
454 int spi_command(unsigned int writecnt, unsigned int readcnt,
455 const unsigned char *writearr, unsigned char *readarr);
456 int spi_write_enable();
457 int spi_write_disable();
458 int spi_chip_erase_60(struct flashchip *flash);
459 int spi_chip_erase_c7(struct flashchip *flash);
460 int spi_chip_erase_60_c7(struct flashchip *flash);
461 int spi_chip_erase_d8(struct flashchip *flash);
462 int spi_block_erase_52(const struct flashchip *flash, unsigned long addr);
463 int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr);
464 int spi_chip_write(struct flashchip *flash, uint8_t *buf);
465 int spi_chip_read(struct flashchip *flash, uint8_t *buf);
466 uint8_t spi_read_status_register();
467 int spi_disable_blockprotect(void);
468 void spi_byte_program(int address, uint8_t byte);
469 int spi_nbyte_read(int address, uint8_t *bytes, int len);
472 int probe_82802ab(struct flashchip *flash);
473 int erase_82802ab(struct flashchip *flash);
474 int write_82802ab(struct flashchip *flash, uint8_t *buf);
477 int probe_29f040b(struct flashchip *flash);
478 int erase_29f040b(struct flashchip *flash);
479 int write_29f040b(struct flashchip *flash, uint8_t *buf);
482 int probe_en29f002a(struct flashchip *flash);
483 int erase_en29f002a(struct flashchip *flash);
484 int write_en29f002a(struct flashchip *flash, uint8_t *buf);
487 int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
488 const unsigned char *writearr, unsigned char *readarr);
489 int ich_spi_read(struct flashchip *flash, uint8_t * buf);
490 int ich_spi_write(struct flashchip *flash, uint8_t * buf);
493 extern uint16_t it8716f_flashport;
494 int it87xx_probe_spi_flash(const char *name);
495 int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
496 const unsigned char *writearr, unsigned char *readarr);
497 int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
498 int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
501 uint8_t oddparity(uint8_t val);
502 void toggle_ready_jedec(volatile uint8_t *dst);
503 void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
504 void unprotect_jedec(volatile uint8_t *bios);
505 void protect_jedec(volatile uint8_t *bios);
506 int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
507 volatile uint8_t *dst);
508 int probe_jedec(struct flashchip *flash);
509 int erase_chip_jedec(struct flashchip *flash);
510 int write_jedec(struct flashchip *flash, uint8_t *buf);
511 int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
512 int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
513 int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
514 volatile uint8_t *dst, unsigned int page_size);
517 int probe_m29f400bt(struct flashchip *flash);
518 int erase_m29f400bt(struct flashchip *flash);
519 int block_erase_m29f400bt(volatile uint8_t *bios,
520 volatile uint8_t *dst);
521 int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
522 int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
523 void toggle_ready_m29f400bt(volatile uint8_t *dst);
524 void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
525 void protect_m29f400bt(volatile uint8_t *bios);
526 void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
527 volatile uint8_t *dst, int page_size);
530 int probe_29f002(struct flashchip *flash);
531 int erase_29f002(struct flashchip *flash);
532 int write_29f002(struct flashchip *flash, uint8_t *buf);
535 int probe_49fl00x(struct flashchip *flash);
536 int erase_49fl00x(struct flashchip *flash);
537 int write_49fl00x(struct flashchip *flash, uint8_t *buf);
539 /* sharplhf00l04.c */
540 int probe_lhf00l04(struct flashchip *flash);
541 int erase_lhf00l04(struct flashchip *flash);
542 int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
543 void toggle_ready_lhf00l04(volatile uint8_t *dst);
544 void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
545 void protect_lhf00l04(volatile uint8_t *bios);
548 int probe_28sf040(struct flashchip *flash);
549 int erase_28sf040(struct flashchip *flash);
550 int write_28sf040(struct flashchip *flash, uint8_t *buf);
553 int probe_39sf020(struct flashchip *flash);
554 int write_39sf020(struct flashchip *flash, uint8_t *buf);
557 int erase_49lf040(struct flashchip *flash);
558 int write_49lf040(struct flashchip *flash, uint8_t *buf);
561 int probe_49lfxxxc(struct flashchip *flash);
562 int erase_49lfxxxc(struct flashchip *flash);
563 int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
566 int probe_sst_fwhub(struct flashchip *flash);
567 int erase_sst_fwhub(struct flashchip *flash);
568 int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
571 int probe_w39v040c(struct flashchip *flash);
572 int erase_w39v040c(struct flashchip *flash);
573 int write_w39v040c(struct flashchip *flash, uint8_t *buf);
576 int probe_winbond_fwhub(struct flashchip *flash);
577 int erase_winbond_fwhub(struct flashchip *flash);
578 int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
581 int probe_w29ee011(struct flashchip *flash);
584 int write_49f002(struct flashchip *flash, uint8_t *buf);
587 int probe_stm50flw0x0x(struct flashchip *flash);
588 int erase_stm50flw0x0x(struct flashchip *flash);
589 int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
591 #endif /* !__FLASH_H__ */