2 * This file is part of the flashrom project.
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
26 #if defined(__GLIBC__)
34 #include <machine/cpufunc.h>
37 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
38 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
39 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
40 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
41 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
42 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
52 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
57 /* With 32bit manufacture_id and model_id we can cover IDs up to
58 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
59 * Identification code.
61 uint32_t manufacture_id;
67 /* Indicate if flashrom has been tested with this flash chip and if
68 * everything worked correctly.
72 int (*probe) (struct flashchip *flash);
73 int (*erase) (struct flashchip *flash);
74 int (*write) (struct flashchip *flash, uint8_t *buf);
75 int (*read) (struct flashchip *flash, uint8_t *buf);
77 /* Some flash devices have an additional register space. */
78 volatile uint8_t *virtual_memory;
79 volatile uint8_t *virtual_registers;
82 #define TEST_UNTESTED 0
84 #define TEST_OK_PROBE (1<<0)
85 #define TEST_OK_READ (1<<1)
86 #define TEST_OK_ERASE (1<<2)
87 #define TEST_OK_WRITE (1<<3)
88 #define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ)
89 #define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
90 #define TEST_OK_MASK 0x0f
92 #define TEST_BAD_PROBE (1<<4)
93 #define TEST_BAD_READ (1<<5)
94 #define TEST_BAD_ERASE (1<<6)
95 #define TEST_BAD_WRITE (1<<7)
96 #define TEST_BAD_MASK 0xf0
98 extern struct flashchip flashchips[];
101 * Please keep this list sorted alphabetically by manufacturer. The first
102 * entry of each section should be the manufacturer ID, followed by the
103 * list of devices from that manufacturer (sorted by device IDs).
105 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
107 * All SPI parts have 16-bit device IDs.
110 #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
112 #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
114 #define AMD_ID 0x01 /* AMD */
115 #define AM_29F040B 0xA4
116 #define AM_29LV040B 0x4F
117 #define AM_29F016D 0xAD
119 #define AMIC_ID 0x7F37 /* AMIC */
120 #define AMIC_ID_NOPREFIX 0x37 /* AMIC */
121 #define AMIC_A25L40P 0x2013
122 #define AMIC_A29040B 0x86
124 #define ASD_ID 0x25 /* ASD, not listed in JEP106W */
125 #define ASD_AE49F2008 0x52
127 #define ATMEL_ID 0x1F /* Atmel */
128 #define AT_25DF021 0x4300
129 #define AT_25DF041A 0x4401
130 #define AT_25DF081 0x4502
131 #define AT_25DF161 0x4602
132 #define AT_25DF321 0x4700 /* also 26DF321 */
133 #define AT_25DF321A 0x4701
134 #define AT_25DF641 0x4800
135 #define AT_26DF041 0x4400
136 #define AT_26DF081 0x4500 /* guessed, no datasheet available */
137 #define AT_26DF081A 0x4501
138 #define AT_26DF161 0x4600
139 #define AT_26DF161A 0x4601
140 #define AT_29C040A 0xA4
141 #define AT_29C020 0xDA
142 #define AT_49F002N 0x07 /* for AT49F002(N) */
143 #define AT_49F002NT 0x08 /* for AT49F002(N)T */
145 #define CATALYST_ID 0x31 /* Catalyst */
147 #define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage*/
148 #define EMST_F49B002UA 0x00
151 * EN25 chips are SPI, first byte of device ID is memory type,
152 * second byte of device ID is log(bitsize)-9.
153 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
154 * is the continuation code for IDs in bank 2.
155 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
156 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
157 * Let's hope they are not manufacturing SPI flash chips as well.
159 #define EON_ID 0x7F1C /* EON Silicon Devices */
160 #define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
161 #define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
162 #define EN_25B10 0x2011
163 #define EN_25B20 0x2012
164 #define EN_25B40 0x2013
165 #define EN_25B80 0x2014
166 #define EN_25B16 0x2015
167 #define EN_25B32 0x2016
168 #define EN_29F512 0x7F21
169 #define EN_29F010 0x7F20
170 #define EN_29F040A 0x7F04
171 #define EN_29LV010 0x7F6E
172 #define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
173 #define EN_29F002T 0x7F92
174 #define EN_29F002B 0x7F97
176 #define FUJITSU_ID 0x04 /* Fujitsu */
177 /* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
178 * try to read it from a location not mentioned in the data sheet.
180 #define MBM29F400TC_STRANGE 0x23
181 #define MBM29F400BC 0x7B
182 #define MBM29F400TC 0x77
184 #define HYUNDAI_ID 0xAD /* Hyundai */
186 #define IMT_ID 0x7F1F /* Integrated Memory Technologies */
187 #define IM_29F004B 0xAE
188 #define IM_29F004T 0xAF
190 #define INTEL_ID 0x89 /* Intel */
192 #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
194 #define MSYSTEMS_ID 0x156F /* M-Systems, not listed in JEP106W */
195 #define MSYSTEMS_MD2200 0xDB
196 #define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
197 #define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
200 * MX25 chips are SPI, first byte of device ID is memory type,
201 * second byte of device ID is log(bitsize)-9.
202 * Generalplus SPI chips seem to be compatible with Macronix
203 * and use the same set of IDs.
205 #define MX_ID 0xC2 /* Macronix (MX) */
206 #define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
207 #define MX_25L1005 0x2011
208 #define MX_25L2005 0x2012
209 #define MX_25L4005 0x2013 /* MX25L4005{,A} */
210 #define MX_25L8005 0x2014
211 #define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
212 #define MX_25L3205 0x2016 /* MX25L3205{,A} */
213 #define MX_25L6405 0x2017 /* MX25L3205{,D} */
214 #define MX_25L1635D 0x2415
215 #define MX_25L3235D 0x2416
216 #define MX_29F002 0xB0
218 /* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
219 * a 0x7F continuation code prefix.
221 #define PMC_ID 0x7F9D /* PMC */
222 #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
223 #define PMC_25LV512 0x7B
224 #define PMC_25LV010 0x7C
225 #define PMC_25LV020 0x7D
226 #define PMC_25LV040 0x7E
227 #define PMC_25LV080B 0x13
228 #define PMC_25LV016B 0x14
229 #define PMC_39LV512 0x1B
230 #define PMC_39F010 0x1C /* also Pm39LV010 */
231 #define PMC_39LV020 0x3D
232 #define PMC_39LV040 0x3E
233 #define PMC_39F020 0x4D
234 #define PMC_39F040 0x4E
235 #define PMC_49FL002 0x6D
236 #define PMC_49FL004 0x6E
238 #define SHARP_ID 0xB0 /* Sharp */
239 #define SHARP_LHF00L04 0xCF
242 * Spansion was previously a joint venture of AMD and Fujitsu.
243 * S25 chips are SPI. The first device ID byte is memory type and
244 * the second device ID byte is memory capacity.
246 #define SPANSION_ID 0x01 /* Spansion */
247 #define SPANSION_S25FL016A 0x0214
250 * SST25 chips are SPI, first byte of device ID is memory type, second
251 * byte of device ID is related to log(bitsize) at least for some chips.
253 #define SST_ID 0xBF /* SST */
254 #define SST_25WF512 0x2501
255 #define SST_25WF010 0x2502
256 #define SST_25WF020 0x2503
257 #define SST_25WF040 0x2504
258 #define SST_25VF016B 0x2541
259 #define SST_25VF032B 0x254A
260 #define SST_25VF040B 0x258D
261 #define SST_25VF080B 0x258E
262 #define SST_27SF512 0xA4
263 #define SST_27SF010 0xA5
264 #define SST_27SF020 0xA6
265 #define SST_27VF010 0xA9
266 #define SST_27VF020 0xAA
267 #define SST_28SF040 0x04
268 #define SST_29EE512 0x5D
269 #define SST_29EE010 0x07
270 #define SST_29LE010 0x08 /* also SST29VE010 */
271 #define SST_29EE020A 0x10
272 #define SST_29LE020 0x12 /* also SST29VE020 */
273 #define SST_29SF020 0x24
274 #define SST_29VF020 0x25
275 #define SST_29SF040 0x13
276 #define SST_29VF040 0x14
277 #define SST_39SF010 0xB5
278 #define SST_39SF020 0xB6
279 #define SST_39SF040 0xB7
280 #define SST_39VF512 0xD4
281 #define SST_39VF010 0xD5
282 #define SST_39VF020 0xD6
283 #define SST_39VF040 0xD7
284 #define SST_49LF040B 0x50
285 #define SST_49LF040 0x51
286 #define SST_49LF020A 0x52
287 #define SST_49LF080A 0x5B
288 #define SST_49LF002A 0x57
289 #define SST_49LF003A 0x1B
290 #define SST_49LF004A 0x60
291 #define SST_49LF008A 0x5A
292 #define SST_49LF004C 0x54
293 #define SST_49LF008C 0x59
294 #define SST_49LF016C 0x5C
295 #define SST_49LF160C 0x4C
298 * ST25P chips are SPI, first byte of device ID is memory type, second
299 * byte of device ID is related to log(bitsize) at least for some chips.
301 #define ST_ID 0x20 /* ST / SGS/Thomson */
302 #define ST_M25P05A 0x2010
303 #define ST_M25P10A 0x2011
304 #define ST_M25P20 0x2012
305 #define ST_M25P40 0x2013
306 #define ST_M25P40_RES 0x12
307 #define ST_M25P80 0x2014
308 #define ST_M25P16 0x2015
309 #define ST_M25P32 0x2016
310 #define ST_M25P64 0x2017
311 #define ST_M25P128 0x2018
312 #define ST_M50FLW040A 0x08
313 #define ST_M50FLW040B 0x28
314 #define ST_M50FLW080A 0x80
315 #define ST_M50FLW080B 0x81
316 #define ST_M50FW040 0x2C
317 #define ST_M50FW080 0x2D
318 #define ST_M50FW016 0x2E
319 #define ST_M50LPW116 0x30
320 #define ST_M29F002B 0x34
321 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
322 #define ST_M29F400BT 0xD5
323 #define ST_M29F040B 0xE2
324 #define ST_M29W010B 0x23
325 #define ST_M29W040B 0xE3
327 #define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
328 #define S29C51001T 0x01
329 #define S29C51002T 0x02
330 #define S29C51004T 0x03
331 #define S29C31004T 0x63
333 #define TI_ID 0x97 /* Texas Instruments */
336 * W25X chips are SPI, first byte of device ID is memory type, second
337 * byte of device ID is related to log(bitsize).
339 #define WINBOND_ID 0xDA /* Winbond */
340 #define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
341 #define W_25X10 0x3011
342 #define W_25X20 0x3012
343 #define W_25X40 0x3013
344 #define W_25X80 0x3014
345 #define W_29C011 0xC1
346 #define W_29C020C 0x45
347 #define W_29C040P 0x46
348 #define W_29EE011 0xC1
349 #define W_39V040FA 0x34
350 #define W_39V040A 0x3D
351 #define W_39V040B 0x54
352 #define W_39V080A 0xD0
353 #define W_39V080FA 0xD3
354 #define W_39V080FA_DM 0x93
355 #define W_49F002U 0x0B
356 #define W_49V002A 0xB0
357 #define W_49V002FA 0x32
360 void myusec_delay(int time);
361 void myusec_calibrate_delay();
363 /* PCI handling for board/chipset_enable */
364 struct pci_access *pacc;
365 struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
366 struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
367 uint16_t card_vendor, uint16_t card_device);
371 int board_flash_enable(const char *vendor, const char *part);
372 void print_supported_boards(void);
374 /* chipset_enable.c */
375 int chipset_flash_enable(void);
376 void print_supported_chipsets(void);
377 extern int ich9_detected;
378 extern void *ich_spibar;
380 /* Physical memory mapping device */
381 #if defined (__sun) && (defined(__i386) || defined(__amd64))
382 # define MEM_DEV "/dev/xsvc"
384 # define MEM_DEV "/dev/mem"
391 #define printf_debug(x...) { if (verbose) printf(x); }
394 int map_flash_registers(struct flashchip *flash);
397 int show_id(uint8_t *bios, int size, int force);
398 int read_romlayout(char *name);
399 int find_romentry(char *name);
400 int handle_romentries(uint8_t *buffer, uint8_t *content);
403 int coreboot_init(void);
404 extern char *lb_part, *lb_vendor;
407 int probe_spi_rdid(struct flashchip *flash);
408 int probe_spi_res(struct flashchip *flash);
409 int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
410 void spi_write_enable();
411 void spi_write_disable();
412 int spi_chip_erase_c7(struct flashchip *flash);
413 int spi_chip_write(struct flashchip *flash, uint8_t *buf);
414 int spi_chip_read(struct flashchip *flash, uint8_t *buf);
415 uint8_t spi_read_status_register();
416 void spi_disable_blockprotect(void);
417 void spi_byte_program(int address, uint8_t byte);
418 void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
419 void spi_nbyte_read(int address, uint8_t *bytes, int len);
422 int probe_82802ab(struct flashchip *flash);
423 int erase_82802ab(struct flashchip *flash);
424 int write_82802ab(struct flashchip *flash, uint8_t *buf);
427 int probe_29f040b(struct flashchip *flash);
428 int erase_29f040b(struct flashchip *flash);
429 int write_29f040b(struct flashchip *flash, uint8_t *buf);
432 int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
433 int ich_spi_read(struct flashchip *flash, uint8_t * buf);
434 int ich_spi_write(struct flashchip *flash, uint8_t * buf);
437 extern uint16_t it8716f_flashport;
438 int it87xx_probe_spi_flash(const char *name);
439 int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
440 int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
441 int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
442 void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
445 uint8_t oddparity(uint8_t val);
446 void toggle_ready_jedec(volatile uint8_t *dst);
447 void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
448 void unprotect_jedec(volatile uint8_t *bios);
449 void protect_jedec(volatile uint8_t *bios);
450 int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
451 volatile uint8_t *dst);
452 int probe_jedec(struct flashchip *flash);
453 int erase_chip_jedec(struct flashchip *flash);
454 int write_jedec(struct flashchip *flash, uint8_t *buf);
455 int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
456 int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
457 int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
458 volatile uint8_t *dst, unsigned int page_size);
461 int probe_m29f400bt(struct flashchip *flash);
462 int erase_m29f400bt(struct flashchip *flash);
463 int block_erase_m29f400bt(volatile uint8_t *bios,
464 volatile uint8_t *dst);
465 int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
466 int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
467 void toggle_ready_m29f400bt(volatile uint8_t *dst);
468 void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
469 void protect_m29f400bt(volatile uint8_t *bios);
470 void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
471 volatile uint8_t *dst, int page_size);
474 int probe_29f002(struct flashchip *flash);
475 int erase_29f002(struct flashchip *flash);
476 int write_29f002(struct flashchip *flash, uint8_t *buf);
479 int probe_49fl00x(struct flashchip *flash);
480 int erase_49fl00x(struct flashchip *flash);
481 int write_49fl00x(struct flashchip *flash, uint8_t *buf);
483 /* sharplhf00l04.c */
484 int probe_lhf00l04(struct flashchip *flash);
485 int erase_lhf00l04(struct flashchip *flash);
486 int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
487 void toggle_ready_lhf00l04(volatile uint8_t *dst);
488 void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
489 void protect_lhf00l04(volatile uint8_t *bios);
492 int probe_28sf040(struct flashchip *flash);
493 int erase_28sf040(struct flashchip *flash);
494 int write_28sf040(struct flashchip *flash, uint8_t *buf);
497 int probe_39sf020(struct flashchip *flash);
498 int write_39sf020(struct flashchip *flash, uint8_t *buf);
501 int erase_49lf040(struct flashchip *flash);
502 int write_49lf040(struct flashchip *flash, uint8_t *buf);
505 int probe_49lfxxxc(struct flashchip *flash);
506 int erase_49lfxxxc(struct flashchip *flash);
507 int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
510 int probe_sst_fwhub(struct flashchip *flash);
511 int erase_sst_fwhub(struct flashchip *flash);
512 int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
515 int probe_winbond_fwhub(struct flashchip *flash);
516 int erase_winbond_fwhub(struct flashchip *flash);
517 int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
520 int probe_w29ee011(struct flashchip *flash);
523 int write_49f002(struct flashchip *flash, uint8_t *buf);
526 int probe_stm50flw0x0x(struct flashchip *flash);
527 int erase_stm50flw0x0x(struct flashchip *flash);
528 int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
530 #endif /* !__FLASH_H__ */