2 * This file is part of the flashrom project.
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
26 #if defined(__GLIBC__)
35 /* With 32bit manufacture_id and model_id we can cover IDs up to
36 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
37 * Identification code.
39 uint32_t manufacture_id;
45 int (*probe) (struct flashchip *flash);
46 int (*erase) (struct flashchip *flash);
47 int (*write) (struct flashchip *flash, uint8_t *buf);
48 int (*read) (struct flashchip *flash, uint8_t *buf);
50 /* Some flash devices have an additional register space. */
51 volatile uint8_t *virtual_memory;
52 volatile uint8_t *virtual_registers;
55 extern struct flashchip flashchips[];
58 * Please keep this list sorted alphabetically by manufacturer. The first
59 * entry of each section should be the manufacturer ID, followed by the
60 * list of devices from that manufacturer (sorted by device IDs).
62 * All LPC/FWH parts (parallel flash) have 8-bit device IDs.
63 * All SPI parts have 16-bit device IDs.
66 #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
68 #define AMD_ID 0x01 /* AMD */
69 #define AM_29F040B 0xA4
70 #define AM_29LV040B 0x4F
71 #define AM_29F016D 0xAD
73 #define AMIC_ID 0x7F37 /* AMIC */
75 #define ASD_ID 0x25 /* ASD, not listed in JEP106W */
76 #define ASD_AE49F2008 0x52
78 #define ATMEL_ID 0x1F /* Atmel */
79 #define AT_29C040A 0xA4
80 #define AT_29C020 0xDA
81 #define AT_49F002N 0x07 /* for AT49F002(N) */
82 #define AT_49F002NT 0x08 /* for AT49F002(N)T */
84 #define CATALYST_ID 0x31 /* Catalyst */
86 #define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage*/
87 #define EMST_F49B002UA 0x00
90 * EN25 chips are SPI, first byte of device ID is memory type,
91 * second byte of device ID is log(bitsize)-9.
92 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
93 * is the continuation code for IDs in bank 2.
94 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
95 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
96 * Let's hope they are not manufacturing SPI flash chips as well.
98 #define EON_ID 0x7F1C /* EON Silicon Devices */
99 #define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
100 #define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
101 #define EN_25B10 0x2011
102 #define EN_25B20 0x2012
103 #define EN_25B40 0x2013
104 #define EN_25B80 0x2014
105 #define EN_25B16 0x2015
106 #define EN_25B32 0x2016
107 #define EN_29F512 0x7F21
108 #define EN_29F010 0x7F20
109 #define EN_29F040A 0x7F04
110 #define EN_29LV010 0x7F6E
111 #define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
112 #define EN_29F002T 0x7F92
113 #define EN_29F002B 0x7F97
115 #define FUJITSU_ID 0x04 /* Fujitsu */
116 /* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
117 * try to read it from a location not mentioned in the data sheet.
119 #define MBM29F400TC_STRANGE 0x23
120 #define MBM29F400BC 0x7B
121 #define MBM29F400TC 0x77
123 #define HYUNDAI_ID 0xAD /* Hyundai */
125 #define IMT_ID 0x7F1F /* Integrated Memory Technologies */
126 #define IM_29F004B 0xAE
127 #define IM_29F004T 0xAF
129 #define INTEL_ID 0x89 /* Intel */
131 #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
133 #define MSYSTEMS_ID 0x156F /* M-Systems, not listed in JEP106W */
134 #define MSYSTEMS_MD2200 0xDB
135 #define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
136 #define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
139 * MX25 chips are SPI, first byte of device ID is memory type,
140 * second byte of device ID is log(bitsize)-9.
142 #define MX_ID 0xC2 /* Macronix (MX) */
143 #define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
144 #define MX_25L1005 0x2011
145 #define MX_25L2005 0x2012
146 #define MX_25L4005 0x2013 /* MX25L4005{,A} */
147 #define MX_25L8005 0x2014
148 #define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
149 #define MX_25L3205 0x2016 /* MX25L3205{,A} */
150 #define MX_25L6405 0x2017 /* MX25L3205{,D} */
151 #define MX_25L1635D 0x2415
152 #define MX_25L3235D 0x2416
153 #define MX_29F002 0xB0
155 /* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
156 * a 0x7F continuation code prefix.
158 #define PMC_ID 0x9D /* PMC */
159 #define PMC_49FL002 0x6D
160 #define PMC_49FL004 0x6E
162 #define SHARP_ID 0xB0 /* Sharp */
163 #define SHARP_LHF00L04 0xCF
166 * SST25 chips are SPI, first byte of device ID is memory type, second
167 * byte of device ID is related to log(bitsize) at least for some chips.
169 #define SST_ID 0xBF /* SST */
170 #define SST_25WF512 0x2501
171 #define SST_25WF010 0x2502
172 #define SST_25WF020 0x2503
173 #define SST_25WF040 0x2504
174 #define SST_25VF016B 0x2541
175 #define SST_25VF032B 0x254A
176 #define SST_25VF040B 0x258D
177 #define SST_25VF080B 0x258E
178 #define SST_29EE020A 0x10
179 #define SST_28SF040 0x04
180 #define SST_39SF010 0xB5
181 #define SST_39SF020 0xB6
182 #define SST_39SF040 0xB7
183 #define SST_39VF020 0xD6
184 #define SST_49LF040B 0x50
185 #define SST_49LF040 0x51
186 #define SST_49LF020A 0x52
187 #define SST_49LF080A 0x5B
188 #define SST_49LF002A 0x57
189 #define SST_49LF003A 0x1B
190 #define SST_49LF004A 0x60
191 #define SST_49LF008A 0x5A
192 #define SST_49LF004C 0x54
193 #define SST_49LF008C 0x59
194 #define SST_49LF016C 0x5C
195 #define SST_49LF160C 0x4C
198 * ST25P chips are SPI, first byte of device ID is memory type, second
199 * byte of device ID is related to log(bitsize) at least for some chips.
201 #define ST_ID 0x20 /* ST / SGS/Thomson */
202 #define ST_M25P05A 0x2010
203 #define ST_M25P10A 0x2011
204 #define ST_M25P20 0x2012
205 #define ST_M25P40 0x2013
206 #define ST_M25P80 0x2014
207 #define ST_M25P16 0x2015
208 #define ST_M25P32 0x2016
209 #define ST_M25P64 0x2017
210 #define ST_M25P128 0x2018
211 #define ST_M50FLW040A 0x08
212 #define ST_M50FLW040B 0x28
213 #define ST_M50FLW080A 0x80
214 #define ST_M50FLW080B 0x81
215 #define ST_M50FW040 0x2C
216 #define ST_M50FW080 0x2D
217 #define ST_M50FW016 0x2E
218 #define ST_M50LPW116 0x30
219 #define ST_M29F002B 0x34
220 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
221 #define ST_M29F400BT 0xD5
222 #define ST_M29F040B 0xE2
223 #define ST_M29W010B 0x23
224 #define ST_M29W040B 0xE3
226 #define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
227 #define S29C51001T 0x01
228 #define S29C51002T 0x02
229 #define S29C51004T 0x03
230 #define S29C31004T 0x63
232 #define TI_ID 0x97 /* Texas Instruments */
234 #define WINBOND_ID 0xDA /* Winbond */
235 #define W_29C011 0xC1
236 #define W_29C020C 0x45
237 #define W_29C040P 0x46
238 #define W_29EE011 0xC1
239 #define W_39V040FA 0x34
240 #define W_39V040A 0x3D
241 #define W_39V040B 0x54
242 #define W_39V080A 0xD0
243 #define W_49F002U 0x0B
244 #define W_49V002A 0xB0
245 #define W_49V002FA 0x32
248 void myusec_delay(int time);
249 void myusec_calibrate_delay();
251 /* PCI handling for board/chipset_enable */
252 struct pci_access *pacc;
253 struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
254 struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
255 uint16_t card_vendor, uint16_t card_device);
258 int board_flash_enable(const char *vendor, const char *part);
260 /* chipset_enable.c */
261 int chipset_flash_enable(void);
263 /* Physical memory mapping device */
264 #if defined (__sun) && (defined(__i386) || defined(__amd64))
265 # define MEM_DEV "/dev/xsvc"
267 # define MEM_DEV "/dev/mem"
274 #define printf_debug(x...) { if (verbose) printf(x); }
277 int map_flash_registers(struct flashchip *flash);
280 int show_id(uint8_t *bios, int size);
281 int read_romlayout(char *name);
282 int find_romentry(char *name);
283 int handle_romentries(uint8_t *buffer, uint8_t *content);
286 int linuxbios_init(void);
287 extern char *lb_part, *lb_vendor;
290 int probe_spi(struct flashchip *flash);
291 int it87xx_probe_spi_flash(const char *name);
292 int generic_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
293 void generic_spi_write_enable();
294 void generic_spi_write_disable();
295 int generic_spi_chip_erase_c7(struct flashchip *flash);
296 int generic_spi_chip_write(struct flashchip *flash, uint8_t *buf);
299 int probe_82802ab(struct flashchip *flash);
300 int erase_82802ab(struct flashchip *flash);
301 int write_82802ab(struct flashchip *flash, uint8_t *buf);
304 int probe_29f040b(struct flashchip *flash);
305 int erase_29f040b(struct flashchip *flash);
306 int write_29f040b(struct flashchip *flash, uint8_t *buf);
309 void toggle_ready_jedec(volatile uint8_t *dst);
310 void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
311 void unprotect_jedec(volatile uint8_t *bios);
312 void protect_jedec(volatile uint8_t *bios);
313 int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
314 volatile uint8_t *dst);
315 int probe_jedec(struct flashchip *flash);
316 int erase_chip_jedec(struct flashchip *flash);
317 int write_jedec(struct flashchip *flash, uint8_t *buf);
318 int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
319 int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
320 int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
321 volatile uint8_t *dst, unsigned int page_size);
324 int probe_m29f400bt(struct flashchip *flash);
325 int erase_m29f400bt(struct flashchip *flash);
326 int block_erase_m29f400bt(volatile uint8_t *bios,
327 volatile uint8_t *dst);
328 int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
329 int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf);
330 void toggle_ready_m29f400bt(volatile uint8_t *dst);
331 void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
332 void protect_m29f400bt(volatile uint8_t *bios);
333 void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
334 volatile uint8_t *dst, int page_size);
337 int probe_29f002(struct flashchip *flash);
338 int erase_29f002(struct flashchip *flash);
339 int write_29f002(struct flashchip *flash, uint8_t *buf);
342 int probe_49fl004(struct flashchip *flash);
343 int erase_49fl004(struct flashchip *flash);
344 int write_49fl004(struct flashchip *flash, uint8_t *buf);
346 /* sharplhf00l04.c */
347 int probe_lhf00l04(struct flashchip *flash);
348 int erase_lhf00l04(struct flashchip *flash);
349 int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
350 void toggle_ready_lhf00l04(volatile uint8_t *dst);
351 void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
352 void protect_lhf00l04(volatile uint8_t *bios);
355 int probe_28sf040(struct flashchip *flash);
356 int erase_28sf040(struct flashchip *flash);
357 int write_28sf040(struct flashchip *flash, uint8_t *buf);
360 int probe_39sf020(struct flashchip *flash);
361 int write_39sf020(struct flashchip *flash, uint8_t *buf);
364 int erase_49lf040(struct flashchip *flash);
365 int write_49lf040(struct flashchip *flash, uint8_t *buf);
368 int probe_49lfxxxc(struct flashchip *flash);
369 int erase_49lfxxxc(struct flashchip *flash);
370 int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
373 int probe_sst_fwhub(struct flashchip *flash);
374 int erase_sst_fwhub(struct flashchip *flash);
375 int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
378 int probe_w29ee011(struct flashchip *flash);
381 int write_49f002(struct flashchip *flash, uint8_t *buf);
383 #endif /* !__FLASH_H__ */