2 * This file is part of the flashrom project.
4 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
5 * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
6 * Copyright (C) 2007 Luc Verhaegen <libv@skynet.be>
7 * Copyright (C) 2007 Carl-Daniel Hailfinger
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 * Contains the board specific flash enables.
34 * Helper functions for many Winbond Super I/Os of the W836xx range.
36 /* Enter extended functions */
37 static void w836xx_ext_enter(uint16_t port)
43 /* Leave extended functions */
44 static void w836xx_ext_leave(uint16_t port)
49 /* General functions for reading/writing Winbond Super I/Os. */
50 static unsigned char wbsio_read(uint16_t index, uint8_t reg)
56 static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)
62 static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)
67 tmp = inb(index+1) & ~mask;
68 outb(tmp | (data & mask), index+1);
72 * Winbond W83627HF: Raise GPIO24.
78 static int w83627hf_gpio24_raise(uint16_t index, const char *name)
80 w836xx_ext_enter(index);
82 /* Is this the w83627hf? */
83 if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID register */
84 fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n",
85 name, wbsio_read(index, 0x20));
86 w836xx_ext_leave(index);
90 /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */
91 wbsio_mask(index, 0x2B, 0x10, 0x10);
93 wbsio_write(index, 0x07, 0x08); /* Select logical device 8: GPIO port 2 */
95 wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */
97 wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */
99 wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
101 wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */
103 w836xx_ext_leave(index);
108 static int w83627hf_gpio24_raise_2e(const char *name)
110 return w83627hf_gpio24_raise(0x2d, name);
114 * Winbond W83627THF: GPIO 4, bit 4
119 static int w83627thf_gpio4_4_raise(uint16_t index, const char *name)
121 w836xx_ext_enter(index);
122 /* Is this the w83627thf? */
123 if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID register */
124 fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
125 name, wbsio_read(index, 0x20));
126 w836xx_ext_leave(index);
130 /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */
132 wbsio_write(index, 0x07, 0x09); /* Select logical device 9: GPIO port 4 */
134 wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */
136 wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */
138 wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */
140 wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */
142 w836xx_ext_leave(index);
147 static int w83627thf_gpio4_4_raise_4e(const char *name)
149 return w83627thf_gpio4_4_raise(0x4E, name);
152 * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs.
154 * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there.
156 static int board_via_epia_m(const char *name)
162 dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
164 fprintf(stderr, "\nERROR: VT8235 ISA Bridge not found.\n");
168 /* GPIO12-15 -> output */
169 val = pci_read_byte(dev, 0xE4);
171 pci_write_byte(dev, 0xE4, val);
173 /* Get Power Management IO address. */
174 base = pci_read_word(dev, 0x88) & 0xFF80;
176 /* enable GPIO15 which is connected to write protect. */
177 val = inb(base + 0x4D);
179 outb(val, base + 0x4D);
186 * - ASUS A7V8X-MX SE and A7V400-MX: AMD K7 + VIA KM400A + VT8235
187 * - Tyan Tomcat K7M: AMD Geode NX + VIA KM400 + VT8237.
189 static int board_asus_a7v8x_mx(const char *name)
194 dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
196 dev = pci_dev_find(0x1106, 0x3227); /* VT8237 ISA bridge */
198 fprintf(stderr, "\nERROR: VT823x ISA bridge not found.\n");
202 /* This bit is marked reserved actually */
203 val = pci_read_byte(dev, 0x59);
205 pci_write_byte(dev, 0x59, val);
207 /* Raise ROM MEMW# line on Winbond w83697 SuperIO */
208 w836xx_ext_enter(0x2E);
210 if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* flash rom enabled? */
211 wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* enable MEMW# */
213 w836xx_ext_leave(0x2E);
219 * Suited for ASUS P5A.
221 * This is rather nasty code, but there's no way to do this cleanly.
222 * We're basically talking to some unknown device on SMBus, my guess
223 * is that it is the Winbond W83781D that lives near the DIP BIOS.
225 static int board_asus_p5a(const char *name)
230 #define ASUSP5A_LOOP 5000
237 for (i = 0; i < ASUSP5A_LOOP; i++) {
239 if (inb(0xE800) & 0x04)
243 if (i == ASUSP5A_LOOP) {
244 printf("%s: Unable to contact device.\n", name);
253 for (i = 0; i < ASUSP5A_LOOP; i++) {
259 if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) {
260 printf("%s: failed to read device.\n", name);
280 for (i = 0; i < ASUSP5A_LOOP; i++) {
286 if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) {
287 printf("%s: failed to write to device.\n", name);
294 static int board_ibm_x3455(const char *name)
298 /* Set GPIO lines in the Broadcom HT-1000 southbridge. */
301 outb(byte | 0x20, 0xcd7);
307 * Suited for EPoX EP-BX3, and maybe some other Intel 440BX based boards.
309 static int board_epox_ep_bx3(const char *name)
326 * We use 2 sets of IDs here, you're free to choose which is which. This
327 * is to provide a very high degree of certainty when matching a board on
328 * the basis of subsystem/card IDs. As not every vendor handles
329 * subsystem/card IDs in a sane manner.
331 * Keep the second set NULLed if it should be ignored.
333 struct board_pciid_enable {
334 /* Any device, but make it sensible, like the isa bridge. */
335 uint16_t first_vendor;
336 uint16_t first_device;
337 uint16_t first_card_vendor;
338 uint16_t first_card_device;
340 /* Any device, but make it sensible, like
341 * the host bridge. May be NULL
343 uint16_t second_vendor;
344 uint16_t second_device;
345 uint16_t second_card_vendor;
346 uint16_t second_card_device;
348 /* From linuxbios table */
353 int (*enable) (const char *name);
356 struct board_pciid_enable board_pciid_enables[] = {
357 {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
358 "gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_spi_flash},
359 {0x10de, 0x03e0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
360 "gigabyte", "m61ps3", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash},
361 {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
362 "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e},
363 {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
364 "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e},
365 {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
366 "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e},
367 {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
368 NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m},
369 {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118,
370 NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx},
371 {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498,
372 NULL, NULL, "Tyan Tomcat K7M", board_asus_a7v8x_mx},
373 {0x10B9, 0x1541, 0x0000, 0x0000, 0x10B9, 0x1533, 0x0000, 0x0000,
374 "asus", "p5a", "ASUS P5A", board_asus_p5a},
375 {0x1166, 0x0205, 0x1014, 0x0347, 0x0000, 0x0000, 0x0000, 0x0000,
376 "ibm", "x3455", "IBM x3455", board_ibm_x3455},
377 {0x8086, 0x7110, 0x0000, 0x0000, 0x8086, 0x7190, 0x0000, 0x0000,
378 "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3},
379 {0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */
383 * Match boards on LinuxBIOS table gathered vendor and part name.
384 * Require main PCI IDs to match too as extra safety.
386 static struct board_pciid_enable *board_match_linuxbios_name(char *vendor,
389 struct board_pciid_enable *board = board_pciid_enables;
391 for (; board->name; board++) {
392 if (!board->lb_vendor || strcmp(board->lb_vendor, vendor))
395 if (!board->lb_part || strcmp(board->lb_part, part))
398 if (!pci_dev_find(board->first_vendor, board->first_device))
401 if (board->second_vendor &&
402 !pci_dev_find(board->second_vendor, board->second_device))
406 printf("NOT FOUND %s:%s\n", vendor, part);
411 * Match boards on PCI IDs and subsystem IDs.
412 * Second set of IDs can be main only or missing completely.
414 static struct board_pciid_enable *board_match_pci_card_ids(void)
416 struct board_pciid_enable *board = board_pciid_enables;
418 for (; board->name; board++) {
419 if (!board->first_card_vendor || !board->first_card_device)
422 if (!pci_card_find(board->first_vendor, board->first_device,
423 board->first_card_vendor,
424 board->first_card_device))
427 if (board->second_vendor) {
428 if (board->second_card_vendor) {
429 if (!pci_card_find(board->second_vendor,
430 board->second_device,
431 board->second_card_vendor,
432 board->second_card_device))
435 if (!pci_dev_find(board->second_vendor,
436 board->second_device))
447 int board_flash_enable(char *vendor, char *part)
449 struct board_pciid_enable *board = NULL;
453 board = board_match_linuxbios_name(vendor, part);
456 board = board_match_pci_card_ids();
459 printf("Found board \"%s\": Enabling flash write... ",
462 ret = board->enable(board->name);