2 * dump mmcr of Elan520 uController (incomplete, see 22005b pg23+).
4 * Copyright 2006 coresystems GmbH
5 * Stefan Reinauer <stepan@coresystems.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
35 volatile uint8_t *mmcr;
36 unsigned long size=4096;
38 if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
39 perror("Can not open /dev/mem");
43 if (getpagesize() > size) {
47 mmcr = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
48 fd_mem, (off_t) (0xFFFEF000));
50 if (mmcr == MAP_FAILED) {
51 perror("Error MMAP /dev/mem");
55 printf("ElanSC520 uC Rev. ID : %04x\n",*(uint16_t *)mmcr);
56 printf("Am5x86 CPU Control : %04x\n",*(uint16_t *)(mmcr+2));
58 printf("SDRAM Control : %04x\n",*(uint16_t *)(mmcr+0x10));
59 printf("SDRAM Timing Control : %04x\n",*(uint16_t *)(mmcr+0x12));
60 printf("SDRAM Bank Config : %04x\n",*(uint16_t *)(mmcr+0x14));
61 printf("SDRAM Bank 0-3 Ending : %04x\n",*(uint16_t *)(mmcr+0x18));
62 printf("ECC Control : %04x\n",*(uint16_t *)(mmcr+0x20));
63 printf("ECC Status : %04x\n",*(uint16_t *)(mmcr+0x21));
64 printf("ECC Check Bit Position: %04x\n",*(uint16_t *)(mmcr+0x22));
65 printf("ECC Check Code Test : %04x\n",*(uint16_t *)(mmcr+0x23));
66 printf("ECC Single Bit ErrAddr: %04x\n",*(uint16_t *)(mmcr+0x24));
67 printf("ECC Multi Bit ErrAddr : %04x\n",*(uint16_t *)(mmcr+0x28));
69 printf("SDRAM Buffer Control : %04x\n",*(uint16_t *)(mmcr+0x40));
71 printf("BOOTCS Control : %04x\n",*(uint16_t *)(mmcr+0x50));
72 printf("BOOTCS1 Control : %04x\n",*(uint16_t *)(mmcr+0x54));
73 printf("BOOTCS2 Control : %04x\n",*(uint16_t *)(mmcr+0x56));
76 printf("Adr Decode Control : %02x\n",*(uint8_t *)(mmcr+0x80));
77 printf("WrProt Violation Stat.: %04x\n",*(uint16_t *)(mmcr+0x82));
78 printf("PAR 0 : %08x\n",*(uint32_t *)(mmcr+0x88));
79 printf("PAR 1 : %08x\n",*(uint32_t *)(mmcr+0x8C));
80 printf("PAR 2 : %08x\n",*(uint32_t *)(mmcr+0x90));
81 printf("PAR 3 : %08x\n",*(uint32_t *)(mmcr+0x94));
82 printf("PAR 4 : %08x\n",*(uint32_t *)(mmcr+0x98));
83 printf("PAR 5 : %08x\n",*(uint32_t *)(mmcr+0x9C));
84 printf("PAR 6 : %08x\n",*(uint32_t *)(mmcr+0xA0));
85 printf("PAR 7 : %08x\n",*(uint32_t *)(mmcr+0xA4));
86 printf("PAR 8 : %08x\n",*(uint32_t *)(mmcr+0xA8));
87 printf("PAR 9 : %08x\n",*(uint32_t *)(mmcr+0xAC));
88 printf("PAR 10 : %08x\n",*(uint32_t *)(mmcr+0xB0));
89 printf("PAR 11 : %08x\n",*(uint32_t *)(mmcr+0xB4));
90 printf("PAR 12 : %08x\n",*(uint32_t *)(mmcr+0xB8));
91 printf("PAR 13 : %08x\n",*(uint32_t *)(mmcr+0xBC));
92 printf("PAR 14 : %08x\n",*(uint32_t *)(mmcr+0xC0));
93 printf("PAR 15 : %08x\n",*(uint32_t *)(mmcr+0xC4));
95 munmap((void *) mmcr, size);
99 int main(int argc, char *argv[])