1 # Sample config file for
3 # This will make a target directory of ./s2880
13 uses CONFIG_ROM_STREAM
14 uses CONFIG_ROM_STREAM_START
16 uses CONFIG_UDELAY_TSC
18 uses ENABLE_FIXED_AND_VARIABLE_MTRRS
20 uses FINAL_MAINBOARD_FIXUP
21 uses HAVE_FALLBACK_BOOT
32 uses MAINBOARD_PART_NUMBER
40 uses ROM_SECTION_OFFSET
44 uses SIO_SYSTEM_CLK_INPUT
47 uses USE_FALLBACK_IMAGE
50 uses HAVE_OPTION_TABLE
51 uses CONFIG_CHIP_CONFIGURE
53 uses CONFIG_CONSOLE_SERIAL8250
55 uses DEFAULT_CONSOLE_LOGLEVEL
56 uses MAXIMUM_CONSOLE_LOGLEVEL
59 uses CONFIG_LOGICAL_CPUS
60 uses MAX_PHYSICAL_CPUS
61 uses LINUXBIOS_EXTRA_VERSION
66 uses CONFIG_REALMODE_IDT
72 #uses CONFIG_LSI_SCSI_FW_FIXUP
74 option HAVE_OPTION_TABLE=1
75 option HAVE_MP_TABLE=1
77 option CONFIG_UDELAY_TSC=0
80 option INTEL_PPRO_MTRR=1
83 option ROM_SIZE=524288
85 #option CONFIG_VGABIOS=1
86 #option CONFIG_REALMODE_IDT=1
87 #option CONFIG_PCIBIOS=1
88 #option VGABIOS_START=0xfff8c000
89 option SCSIFW_START=0xfff80000
92 option HAVE_FALLBACK_BOOT=1
94 # use the new chip configure code.
96 option CONFIG_CHIP_CONFIGURE=1
97 #option CONFIG_LSI_SCSI_FW_FIXUP=1
100 ### Customize our winbond superio chip for this motherboard
103 option SIO_SYSTEM_CLK_INPUT=0
106 ### Build code to export a programmable irq routing table
108 option HAVE_PIRQ_TABLE=1
109 option IRQ_SLOT_COUNT=15
112 ### Build code for SMP support
113 ### Only worry about 2 micro processors
116 option CONFIG_MAX_CPUS=2
118 option CONFIG_LOGICAL_CPUS=0
119 option MAX_PHYSICAL_CPUS=2
122 ### Build code to setup a generic IOAPIC
124 option CONFIG_IOAPIC=1
127 ### MEMORY_HOLE instructs earlymtrr.inc to
128 ### enable caching from 0-640KB and to disable
129 ### caching from 640KB-1MB using fixed MTRRs
131 ### Enabling this option breaks SMP because secondary
132 ### CPU identification depends on only variable MTRRs
135 #option MEMORY_HOLE=0
138 ### Enable both fixed and variable MTRRS
139 ### When we setup MTRRs in mtrr.c
141 ### We must setup the fixed mtrrs or we confuse SMP secondary
142 ### processor identification
144 option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
147 ### Clean up the motherboard id strings
149 option MAINBOARD_PART_NUMBER="S2882"
150 option MAINBOARD_VENDOR="Tyan"
153 ### Call the final_mainboard_fixup function
155 option FINAL_MAINBOARD_FIXUP=1
158 ### Compute the location and size of where this firmware image
159 ### (linuxBIOS plus bootloader) will live in the boot rom chip.
161 #option FALLBACK_SIZE=524288
162 option FALLBACK_SIZE=98304
164 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
165 option ROM_IMAGE_SIZE=65536
169 ### Compute where this copy of linuxBIOS will start in the boot rom
174 ## We do use compressed image
175 option CONFIG_COMPRESS=1
177 option USE_ELF_BOOT=1
180 option CONFIG_CONSOLE_SERIAL8250=1
181 option TTYS0_BAUD=115200
184 ### Select the linuxBIOS loglevel
186 ## EMERG 1 system is unusable
187 ## ALERT 2 action must be taken immediately
188 ## CRIT 3 critical conditions
189 ## ERR 4 error conditions
190 ## WARNING 5 warning conditions
191 ## NOTICE 6 normal but significant condition
192 ## INFO 7 informational
193 ## DEBUG 8 debug-level messages
194 ## SPEW 9 Way too many details
196 ## Request this level of debugging output
197 option DEFAULT_CONSOLE_LOGLEVEL=8
198 ## At a maximum only compile in this level of debugging
199 option MAXIMUM_CONSOLE_LOGLEVEL=9
203 option AMD8111_DEV=0x5
207 ## LinuxBIOS C code runs at this location in RAM
208 option _RAMBASE=0x004000
213 option STACK_SIZE=0x2000
218 option HEAP_SIZE=0x2000
222 ### Compute the start location and size size of
223 ### The linuxBIOS bootloader.
225 option CONFIG_ROM_STREAM = 1
231 # option ROM_SIZE = 475136
232 # 48K for SCSI FW and 48K for ATI ROM
233 # option ROM_SIZE = 425984
234 option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
235 option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
236 option ROM_SECTION_OFFSET= 0
238 option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
239 option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
240 option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
242 option XIP_ROM_SIZE = FALLBACK_SIZE
243 option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
246 payload ../../tg3--ide_disk.zelf
250 option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
251 option USE_FALLBACK_IMAGE=1
252 option ROM_SECTION_SIZE = FALLBACK_SIZE
253 option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
255 option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
256 option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
257 option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
259 option XIP_ROM_SIZE = FALLBACK_SIZE
260 option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
263 payload ../../tg3.zelf
266 buildrom ROM_SIZE "normal" "fallback"