1 /* src/vm/jit/x86_64/emit.c - x86_64 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 6171 2006-12-11 11:47:42Z twisti $
40 #include "vm/jit/x86_64/codegen.h"
41 #include "vm/jit/x86_64/emit.h"
43 #if defined(ENABLE_THREADS)
44 # include "threads/native/lock.h"
47 #include "vm/builtin.h"
48 #include "vm/options.h"
49 #include "vm/jit/abi-asm.h"
50 #include "vm/jit/asmpart.h"
51 #include "vm/jit/codegen-common.h"
52 #include "vm/jit/emit-common.h"
53 #include "vm/jit/jit.h"
54 #include "vm/jit/replace.h"
57 /* emit_load *******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (IS_INMEMORY(src->flags)) {
76 disp = src->vv.regoff * 8;
78 if (IS_FLT_DBL_TYPE(src->type)) {
79 if (IS_2_WORD_TYPE(src->type))
80 M_DLD(tempreg, REG_SP, disp);
82 M_FLD(tempreg, REG_SP, disp);
85 if (IS_INT_TYPE(src->type))
86 M_ILD(tempreg, REG_SP, disp);
88 M_LLD(tempreg, REG_SP, disp);
100 /* emit_store ******************************************************************
102 This function generates the code to store the result of an
103 operation back into a spilled pseudo-variable. If the
104 pseudo-variable has not been spilled in the first place, this
105 function will generate nothing.
107 *******************************************************************************/
109 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
118 /* get required compiler data */
123 /* do we have to generate a conditional move? */
125 if ((iptr != NULL) && (iptr->opc & ICMD_CONDITION_MASK)) {
126 /* the passed register d is actually the source register */
130 /* Only pass the opcode to codegen_reg_of_var to get the real
131 destination register. */
133 opcode = iptr->opc & ICMD_OPCODE_MASK;
135 /* get the real destination register */
137 d = codegen_reg_of_var(rd, opcode, dst, REG_ITMP1);
139 /* and emit the conditional move */
141 emit_cmovxx(cd, iptr, s, d);
145 if (IS_INMEMORY(dst->flags)) {
148 disp = dst->vv.regoff * 8;
150 if (IS_FLT_DBL_TYPE(dst->type)) {
151 if (IS_2_WORD_TYPE(dst->type))
152 M_DST(d, REG_SP, disp);
154 M_FST(d, REG_SP, disp);
157 M_LST(d, REG_SP, disp);
162 /* emit_copy *******************************************************************
164 Generates a register/memory to register/memory copy.
166 *******************************************************************************/
168 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
173 /* get required compiler data */
177 if ((src->vv.regoff != dst->vv.regoff) ||
178 ((src->flags ^ dst->flags) & INMEMORY)) {
180 /* If one of the variables resides in memory, we can eliminate
181 the register move from/to the temporary register with the
182 order of getting the destination register and the load. */
184 if (IS_INMEMORY(src->flags)) {
185 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
186 s1 = emit_load(jd, iptr, src, d);
189 s1 = emit_load(jd, iptr, src, REG_IFTMP);
190 d = codegen_reg_of_var(iptr->opc, dst, s1);
194 if (IS_FLT_DBL_TYPE(src->type))
200 emit_store(jd, iptr, dst, d);
205 void emit_cmovxx(codegendata *cd, instruction *iptr, s4 s, s4 d)
208 switch (iptr->flags.fields.condition) {
232 /* emit_arithmetic_check *******************************************************
234 Emit an ArithmeticException check.
236 *******************************************************************************/
238 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
240 if (INSTRUCTION_MUST_CHECK(iptr)) {
243 codegen_add_arithmeticexception_ref(cd);
248 /* emit_arrayindexoutofbounds_check ********************************************
250 Emit a ArrayIndexOutOfBoundsException check.
252 *******************************************************************************/
254 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
256 if (INSTRUCTION_MUST_CHECK(iptr)) {
257 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
258 M_ICMP(REG_ITMP3, s2);
260 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
265 /* emit_classcast_check ********************************************************
267 Emit a ClassCastException check.
269 *******************************************************************************/
271 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
273 vm_abort("IMPLEMENT ME!");
277 /* emit_nullpointer_check ******************************************************
279 Emit a NullPointerException check.
281 *******************************************************************************/
283 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
285 if (INSTRUCTION_MUST_CHECK(iptr)) {
288 codegen_add_nullpointerexception_ref(cd);
293 /* emit_exception_stubs ********************************************************
295 Generates the code for the exception stubs.
297 *******************************************************************************/
299 void emit_exception_stubs(jitdata *jd)
308 /* get required compiler data */
313 /* generate exception stubs */
317 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
318 /* back-patch the branch to this exception code */
320 branchmpc = er->branchpos;
321 targetmpc = cd->mcodeptr - cd->mcodebase;
323 md_codegen_patch_branch(cd, branchmpc, targetmpc);
327 /* Check if the exception is an
328 ArrayIndexOutOfBoundsException. If so, move index register
332 M_MOV(er->reg, rd->argintregs[4]);
334 /* calcuate exception address */
336 M_MOV_IMM(0, rd->argintregs[3]);
338 M_AADD_IMM32(er->branchpos - 6, rd->argintregs[3]);
340 /* move function to call into REG_ITMP3 */
342 M_MOV_IMM(er->function, REG_ITMP3);
344 if (targetdisp == 0) {
345 targetdisp = cd->mcodeptr - cd->mcodebase;
347 emit_lea_membase_reg(cd, RIP, -((cd->mcodeptr + 7) - cd->mcodebase), rd->argintregs[0]);
348 M_MOV(REG_SP, rd->argintregs[1]);
349 M_ALD(rd->argintregs[2], REG_SP, cd->stackframesize * 8);
351 M_ASUB_IMM(2 * 8, REG_SP);
352 M_AST(rd->argintregs[3], REG_SP, 0 * 8); /* store XPC */
356 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
357 M_AADD_IMM(2 * 8, REG_SP);
359 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
363 M_JMP_IMM((cd->mcodebase + targetdisp) -
364 (cd->mcodeptr + PATCHER_CALL_SIZE));
370 /* emit_patcher_stubs **********************************************************
372 Generates the code for the patcher stubs.
374 *******************************************************************************/
376 void emit_patcher_stubs(jitdata *jd)
386 /* get required compiler data */
390 /* generate code patching stub call code */
394 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
395 /* check size of code segment */
399 /* Get machine code which is patched back in later. A
400 `call rel32' is 5 bytes long (but read 8 bytes). */
402 savedmcodeptr = cd->mcodebase + pref->branchpos;
403 mcode = *((u8 *) savedmcodeptr);
405 /* patch in `call rel32' to call the following code */
407 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
408 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
410 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
412 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
414 /* move pointer to java_objectheader onto stack */
416 #if defined(ENABLE_THREADS)
417 /* create a virtual java_objectheader */
419 (void) dseg_add_unique_address(cd, NULL); /* flcword */
420 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
421 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
423 emit_lea_membase_reg(cd, RIP, -((cd->mcodeptr + 7) - cd->mcodebase) + disp, REG_ITMP3);
429 /* move machine code bytes and classinfo pointer into registers */
431 M_MOV_IMM(mcode, REG_ITMP3);
434 M_MOV_IMM(pref->ref, REG_ITMP3);
437 M_MOV_IMM(pref->disp, REG_ITMP3);
440 M_MOV_IMM(pref->patcher, REG_ITMP3);
443 if (targetdisp == 0) {
444 targetdisp = cd->mcodeptr - cd->mcodebase;
446 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
450 M_JMP_IMM((cd->mcodebase + targetdisp) -
451 (cd->mcodeptr + PATCHER_CALL_SIZE));
457 /* emit_replacement_stubs ******************************************************
459 Generates the code for the replacement stubs.
461 *******************************************************************************/
463 void emit_replacement_stubs(jitdata *jd)
474 /* get required compiler data */
479 rplp = code->rplpoints;
481 /* store beginning of replacement stubs */
483 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
485 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
486 /* do not generate stubs for non-trappable points */
488 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
491 /* check code segment size */
495 /* note start of stub code */
498 savedmcodeptr = cd->mcodeptr;
501 /* push address of `rplpoint` struct */
503 M_MOV_IMM(rplp, REG_ITMP3);
506 /* jump to replacement function */
508 M_MOV_IMM(asm_replacement_out, REG_ITMP3);
512 assert((cd->mcodeptr - savedmcodeptr) == REPLACEMENT_STUB_SIZE);
517 /* emit_verbosecall_enter ******************************************************
519 Generates the code for the call trace.
521 *******************************************************************************/
524 void emit_verbosecall_enter(jitdata *jd)
532 /* get required compiler data */
540 /* mark trace code */
544 /* additional +1 is for 16-byte stack alignment */
546 M_LSUB_IMM((ARG_CNT + TMP_CNT + 1 + 1) * 8, REG_SP);
548 /* save argument registers */
550 for (i = 0; i < INT_ARG_CNT; i++)
551 M_LST(rd->argintregs[i], REG_SP, (1 + i) * 8);
553 for (i = 0; i < FLT_ARG_CNT; i++)
554 M_DST(rd->argfltregs[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
556 /* save temporary registers for leaf methods */
558 if (jd->isleafmethod) {
559 for (i = 0; i < INT_TMP_CNT; i++)
560 M_LST(rd->tmpintregs[i], REG_SP, (1 + ARG_CNT + i) * 8);
562 for (i = 0; i < FLT_TMP_CNT; i++)
563 M_DST(rd->tmpfltregs[i], REG_SP, (1 + ARG_CNT + INT_TMP_CNT + i) * 8);
566 /* show integer hex code for float arguments */
568 for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
569 /* If the paramtype is a float, we have to right shift all
570 following integer registers. */
572 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
573 for (k = INT_ARG_CNT - 2; k >= i; k--)
574 M_MOV(rd->argintregs[k], rd->argintregs[k + 1]);
576 emit_movd_freg_reg(cd, rd->argfltregs[j], rd->argintregs[i]);
581 M_MOV_IMM(m, REG_ITMP2);
582 M_AST(REG_ITMP2, REG_SP, 0 * 8);
583 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
586 /* restore argument registers */
588 for (i = 0; i < INT_ARG_CNT; i++)
589 M_LLD(rd->argintregs[i], REG_SP, (1 + i) * 8);
591 for (i = 0; i < FLT_ARG_CNT; i++)
592 M_DLD(rd->argfltregs[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
594 /* restore temporary registers for leaf methods */
596 if (jd->isleafmethod) {
597 for (i = 0; i < INT_TMP_CNT; i++)
598 M_LLD(rd->tmpintregs[i], REG_SP, (1 + ARG_CNT + i) * 8);
600 for (i = 0; i < FLT_TMP_CNT; i++)
601 M_DLD(rd->tmpfltregs[i], REG_SP, (1 + ARG_CNT + INT_TMP_CNT + i) * 8);
604 M_LADD_IMM((ARG_CNT + TMP_CNT + 1 + 1) * 8, REG_SP);
606 /* mark trace code */
610 #endif /* !defined(NDEBUG) */
613 /* emit_verbosecall_exit *******************************************************
615 Generates the code for the call trace.
617 *******************************************************************************/
620 void emit_verbosecall_exit(jitdata *jd)
626 /* get required compiler data */
632 /* mark trace code */
636 M_ASUB_IMM(2 * 8, REG_SP);
638 M_LST(REG_RESULT, REG_SP, 0 * 8);
639 M_DST(REG_FRESULT, REG_SP, 1 * 8);
641 M_MOV_IMM(m, rd->argintregs[0]);
642 M_MOV(REG_RESULT, rd->argintregs[1]);
643 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
644 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
646 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
649 M_LLD(REG_RESULT, REG_SP, 0 * 8);
650 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
652 M_AADD_IMM(2 * 8, REG_SP);
654 /* mark trace code */
658 #endif /* !defined(NDEBUG) */
661 /* code generation functions **************************************************/
663 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
665 if ((basereg == REG_SP) || (basereg == R12)) {
667 emit_address_byte(0, dreg, REG_SP);
668 emit_address_byte(0, REG_SP, REG_SP);
670 } else if (IS_IMM8(disp)) {
671 emit_address_byte(1, dreg, REG_SP);
672 emit_address_byte(0, REG_SP, REG_SP);
676 emit_address_byte(2, dreg, REG_SP);
677 emit_address_byte(0, REG_SP, REG_SP);
681 } else if ((disp) == 0 && (basereg) != RBP && (basereg) != R13) {
682 emit_address_byte(0,(dreg),(basereg));
684 } else if ((basereg) == RIP) {
685 emit_address_byte(0, dreg, RBP);
690 emit_address_byte(1, dreg, basereg);
694 emit_address_byte(2, dreg, basereg);
701 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
703 if ((basereg == REG_SP) || (basereg == R12)) {
704 emit_address_byte(2, dreg, REG_SP);
705 emit_address_byte(0, REG_SP, REG_SP);
709 emit_address_byte(2, dreg, basereg);
715 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
718 emit_address_byte(0, reg, 4);
719 emit_address_byte(scale, indexreg, 5);
722 else if ((disp == 0) && (basereg != RBP) && (basereg != R13)) {
723 emit_address_byte(0, reg, 4);
724 emit_address_byte(scale, indexreg, basereg);
726 else if (IS_IMM8(disp)) {
727 emit_address_byte(1, reg, 4);
728 emit_address_byte(scale, indexreg, basereg);
732 emit_address_byte(2, reg, 4);
733 emit_address_byte(scale, indexreg, basereg);
739 void emit_ishift(jitdata *jd, s4 shift_op, instruction *iptr)
742 varinfo *v_s1,*v_s2,*v_dst;
745 /* get required compiler data */
749 v_s1 = VAROP(iptr->s1);
750 v_s2 = VAROP(iptr->sx.s23.s2);
751 v_dst = VAROP(iptr->dst);
753 s1 = v_s1->vv.regoff;
754 s2 = v_s2->vv.regoff;
755 d = v_dst->vv.regoff;
757 M_INTMOVE(RCX, REG_ITMP1); /* save RCX */
759 if (IS_INMEMORY(v_dst->flags)) {
760 if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
762 M_ILD(RCX, REG_SP, s2 * 8);
763 emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
766 M_ILD(RCX, REG_SP, s2 * 8);
767 M_ILD(REG_ITMP2, REG_SP, s1 * 8);
768 emit_shiftl_reg(cd, shift_op, REG_ITMP2);
769 M_IST(REG_ITMP2, REG_SP, d * 8);
772 } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
773 /* s1 may be equal to RCX */
776 M_ILD(REG_ITMP1, REG_SP, s2 * 8);
777 M_IST(s1, REG_SP, d * 8);
778 M_INTMOVE(REG_ITMP1, RCX);
781 M_IST(s1, REG_SP, d * 8);
782 M_ILD(RCX, REG_SP, s2 * 8);
786 M_ILD(RCX, REG_SP, s2 * 8);
787 M_IST(s1, REG_SP, d * 8);
790 emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
792 } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
795 emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
799 M_ILD(REG_ITMP2, REG_SP, s1 * 8);
800 emit_shiftl_reg(cd, shift_op, REG_ITMP2);
801 M_IST(REG_ITMP2, REG_SP, d * 8);
805 /* s1 may be equal to RCX */
806 M_IST(s1, REG_SP, d * 8);
808 emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
811 M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
819 if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
820 M_ILD(RCX, REG_SP, s2 * 8);
821 M_ILD(d, REG_SP, s1 * 8);
822 emit_shiftl_reg(cd, shift_op, d);
824 } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
825 /* s1 may be equal to RCX */
827 M_ILD(RCX, REG_SP, s2 * 8);
828 emit_shiftl_reg(cd, shift_op, d);
830 } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
832 M_ILD(d, REG_SP, s1 * 8);
833 emit_shiftl_reg(cd, shift_op, d);
836 /* s1 may be equal to RCX */
839 /* d cannot be used to backup s1 since this would
841 M_INTMOVE(s1, REG_ITMP3);
843 M_INTMOVE(REG_ITMP3, d);
851 /* d may be equal to s2 */
855 emit_shiftl_reg(cd, shift_op, d);
859 M_INTMOVE(REG_ITMP3, RCX);
861 M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
866 void emit_lshift(jitdata *jd, s4 shift_op, instruction *iptr)
869 varinfo *v_s1,*v_s2,*v_dst;
872 /* get required compiler data */
876 v_s1 = VAROP(iptr->s1);
877 v_s2 = VAROP(iptr->sx.s23.s2);
878 v_dst = VAROP(iptr->dst);
880 s1 = v_s1->vv.regoff;
881 s2 = v_s2->vv.regoff;
882 d = v_dst->vv.regoff;
884 M_INTMOVE(RCX, REG_ITMP1); /* save RCX */
886 if (IS_INMEMORY(v_dst->flags)) {
887 if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
889 M_ILD(RCX, REG_SP, s2 * 8);
890 emit_shift_membase(cd, shift_op, REG_SP, d * 8);
893 M_ILD(RCX, REG_SP, s2 * 8);
894 M_LLD(REG_ITMP2, REG_SP, s1 * 8);
895 emit_shift_reg(cd, shift_op, REG_ITMP2);
896 M_LST(REG_ITMP2, REG_SP, d * 8);
899 } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
900 /* s1 may be equal to RCX */
903 M_ILD(REG_ITMP1, REG_SP, s2 * 8);
904 M_LST(s1, REG_SP, d * 8);
905 M_INTMOVE(REG_ITMP1, RCX);
908 M_LST(s1, REG_SP, d * 8);
909 M_ILD(RCX, REG_SP, s2 * 8);
913 M_ILD(RCX, REG_SP, s2 * 8);
914 M_LST(s1, REG_SP, d * 8);
917 emit_shift_membase(cd, shift_op, REG_SP, d * 8);
919 } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
922 emit_shift_membase(cd, shift_op, REG_SP, d * 8);
926 M_LLD(REG_ITMP2, REG_SP, s1 * 8);
927 emit_shift_reg(cd, shift_op, REG_ITMP2);
928 M_LST(REG_ITMP2, REG_SP, d * 8);
932 /* s1 may be equal to RCX */
933 M_LST(s1, REG_SP, d * 8);
935 emit_shift_membase(cd, shift_op, REG_SP, d * 8);
938 M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
946 if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
947 M_ILD(RCX, REG_SP, s2 * 8);
948 M_LLD(d, REG_SP, s1 * 8);
949 emit_shift_reg(cd, shift_op, d);
951 } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
952 /* s1 may be equal to RCX */
954 M_ILD(RCX, REG_SP, s2 * 8);
955 emit_shift_reg(cd, shift_op, d);
957 } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
959 M_LLD(d, REG_SP, s1 * 8);
960 emit_shift_reg(cd, shift_op, d);
963 /* s1 may be equal to RCX */
966 /* d cannot be used to backup s1 since this would
968 M_INTMOVE(s1, REG_ITMP3);
970 M_INTMOVE(REG_ITMP3, d);
978 /* d may be equal to s2 */
982 emit_shift_reg(cd, shift_op, d);
986 M_INTMOVE(REG_ITMP3, RCX);
988 M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
993 /* low-level code emitter functions *******************************************/
995 void emit_mov_reg_reg(codegendata *cd, s8 reg, s8 dreg)
997 emit_rex(1,(reg),0,(dreg));
998 *(cd->mcodeptr++) = 0x89;
999 emit_reg((reg),(dreg));
1003 void emit_mov_imm_reg(codegendata *cd, s8 imm, s8 reg)
1005 emit_rex(1,0,0,(reg));
1006 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
1011 void emit_movl_reg_reg(codegendata *cd, s8 reg, s8 dreg)
1013 emit_rex(0,(reg),0,(dreg));
1014 *(cd->mcodeptr++) = 0x89;
1015 emit_reg((reg),(dreg));
1019 void emit_movl_imm_reg(codegendata *cd, s8 imm, s8 reg) {
1020 emit_rex(0,0,0,(reg));
1021 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
1026 void emit_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
1027 emit_rex(1,(reg),0,(basereg));
1028 *(cd->mcodeptr++) = 0x8b;
1029 emit_membase(cd, (basereg),(disp),(reg));
1034 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
1035 * constant membase immediate length of 32bit
1037 void emit_mov_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
1038 emit_rex(1,(reg),0,(basereg));
1039 *(cd->mcodeptr++) = 0x8b;
1040 emit_membase32(cd, (basereg),(disp),(reg));
1044 void emit_movl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg)
1046 emit_rex(0,(reg),0,(basereg));
1047 *(cd->mcodeptr++) = 0x8b;
1048 emit_membase(cd, (basereg),(disp),(reg));
1052 /* ATTENTION: Always emit a REX byte, because the instruction size can
1053 be smaller when all register indexes are smaller than 7. */
1054 void emit_movl_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg)
1056 emit_byte_rex((reg),0,(basereg));
1057 *(cd->mcodeptr++) = 0x8b;
1058 emit_membase32(cd, (basereg),(disp),(reg));
1062 void emit_mov_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
1063 emit_rex(1,(reg),0,(basereg));
1064 *(cd->mcodeptr++) = 0x89;
1065 emit_membase(cd, (basereg),(disp),(reg));
1069 void emit_mov_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
1070 emit_rex(1,(reg),0,(basereg));
1071 *(cd->mcodeptr++) = 0x89;
1072 emit_membase32(cd, (basereg),(disp),(reg));
1076 void emit_movl_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
1077 emit_rex(0,(reg),0,(basereg));
1078 *(cd->mcodeptr++) = 0x89;
1079 emit_membase(cd, (basereg),(disp),(reg));
1083 /* Always emit a REX byte, because the instruction size can be smaller when */
1084 /* all register indexes are smaller than 7. */
1085 void emit_movl_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
1086 emit_byte_rex((reg),0,(basereg));
1087 *(cd->mcodeptr++) = 0x89;
1088 emit_membase32(cd, (basereg),(disp),(reg));
1092 void emit_mov_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
1093 emit_rex(1,(reg),(indexreg),(basereg));
1094 *(cd->mcodeptr++) = 0x8b;
1095 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1099 void emit_movl_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
1100 emit_rex(0,(reg),(indexreg),(basereg));
1101 *(cd->mcodeptr++) = 0x8b;
1102 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1106 void emit_mov_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
1107 emit_rex(1,(reg),(indexreg),(basereg));
1108 *(cd->mcodeptr++) = 0x89;
1109 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1113 void emit_movl_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
1114 emit_rex(0,(reg),(indexreg),(basereg));
1115 *(cd->mcodeptr++) = 0x89;
1116 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1120 void emit_movw_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
1121 *(cd->mcodeptr++) = 0x66;
1122 emit_rex(0,(reg),(indexreg),(basereg));
1123 *(cd->mcodeptr++) = 0x89;
1124 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1128 void emit_movb_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
1129 emit_byte_rex((reg),(indexreg),(basereg));
1130 *(cd->mcodeptr++) = 0x88;
1131 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1135 void emit_mov_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
1136 emit_rex(1,0,0,(basereg));
1137 *(cd->mcodeptr++) = 0xc7;
1138 emit_membase(cd, (basereg),(disp),0);
1143 void emit_mov_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
1144 emit_rex(1,0,0,(basereg));
1145 *(cd->mcodeptr++) = 0xc7;
1146 emit_membase32(cd, (basereg),(disp),0);
1151 void emit_movl_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
1152 emit_rex(0,0,0,(basereg));
1153 *(cd->mcodeptr++) = 0xc7;
1154 emit_membase(cd, (basereg),(disp),0);
1159 /* Always emit a REX byte, because the instruction size can be smaller when */
1160 /* all register indexes are smaller than 7. */
1161 void emit_movl_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
1162 emit_byte_rex(0,0,(basereg));
1163 *(cd->mcodeptr++) = 0xc7;
1164 emit_membase32(cd, (basereg),(disp),0);
1169 void emit_movsbq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
1171 emit_rex(1,(dreg),0,(reg));
1172 *(cd->mcodeptr++) = 0x0f;
1173 *(cd->mcodeptr++) = 0xbe;
1174 /* XXX: why do reg and dreg have to be exchanged */
1175 emit_reg((dreg),(reg));
1179 void emit_movswq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
1181 emit_rex(1,(dreg),0,(reg));
1182 *(cd->mcodeptr++) = 0x0f;
1183 *(cd->mcodeptr++) = 0xbf;
1184 /* XXX: why do reg and dreg have to be exchanged */
1185 emit_reg((dreg),(reg));
1189 void emit_movslq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
1191 emit_rex(1,(dreg),0,(reg));
1192 *(cd->mcodeptr++) = 0x63;
1193 /* XXX: why do reg and dreg have to be exchanged */
1194 emit_reg((dreg),(reg));
1198 void emit_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
1200 emit_rex(1,(dreg),0,(reg));
1201 *(cd->mcodeptr++) = 0x0f;
1202 *(cd->mcodeptr++) = 0xb7;
1203 /* XXX: why do reg and dreg have to be exchanged */
1204 emit_reg((dreg),(reg));
1208 void emit_movswq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
1209 emit_rex(1,(reg),(indexreg),(basereg));
1210 *(cd->mcodeptr++) = 0x0f;
1211 *(cd->mcodeptr++) = 0xbf;
1212 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1216 void emit_movsbq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
1217 emit_rex(1,(reg),(indexreg),(basereg));
1218 *(cd->mcodeptr++) = 0x0f;
1219 *(cd->mcodeptr++) = 0xbe;
1220 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1224 void emit_movzwq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
1225 emit_rex(1,(reg),(indexreg),(basereg));
1226 *(cd->mcodeptr++) = 0x0f;
1227 *(cd->mcodeptr++) = 0xb7;
1228 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1232 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1234 emit_rex(1,0,(indexreg),(basereg));
1235 *(cd->mcodeptr++) = 0xc7;
1236 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1241 void emit_movl_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1243 emit_rex(0,0,(indexreg),(basereg));
1244 *(cd->mcodeptr++) = 0xc7;
1245 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1250 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1252 *(cd->mcodeptr++) = 0x66;
1253 emit_rex(0,0,(indexreg),(basereg));
1254 *(cd->mcodeptr++) = 0xc7;
1255 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1260 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1262 emit_rex(0,0,(indexreg),(basereg));
1263 *(cd->mcodeptr++) = 0xc6;
1264 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1272 void emit_alu_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
1274 emit_rex(1,(reg),0,(dreg));
1275 *(cd->mcodeptr++) = (((opc)) << 3) + 1;
1276 emit_reg((reg),(dreg));
1280 void emit_alul_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
1282 emit_rex(0,(reg),0,(dreg));
1283 *(cd->mcodeptr++) = (((opc)) << 3) + 1;
1284 emit_reg((reg),(dreg));
1288 void emit_alu_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp)
1290 emit_rex(1,(reg),0,(basereg));
1291 *(cd->mcodeptr++) = (((opc)) << 3) + 1;
1292 emit_membase(cd, (basereg),(disp),(reg));
1296 void emit_alul_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp)
1298 emit_rex(0,(reg),0,(basereg));
1299 *(cd->mcodeptr++) = (((opc)) << 3) + 1;
1300 emit_membase(cd, (basereg),(disp),(reg));
1304 void emit_alu_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg)
1306 emit_rex(1,(reg),0,(basereg));
1307 *(cd->mcodeptr++) = (((opc)) << 3) + 3;
1308 emit_membase(cd, (basereg),(disp),(reg));
1312 void emit_alul_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg)
1314 emit_rex(0,(reg),0,(basereg));
1315 *(cd->mcodeptr++) = (((opc)) << 3) + 3;
1316 emit_membase(cd, (basereg),(disp),(reg));
1320 void emit_alu_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
1322 emit_rex(1,0,0,(dreg));
1323 *(cd->mcodeptr++) = 0x83;
1324 emit_reg((opc),(dreg));
1327 emit_rex(1,0,0,(dreg));
1328 *(cd->mcodeptr++) = 0x81;
1329 emit_reg((opc),(dreg));
1335 void emit_alu_imm32_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
1336 emit_rex(1,0,0,(dreg));
1337 *(cd->mcodeptr++) = 0x81;
1338 emit_reg((opc),(dreg));
1343 void emit_alul_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
1345 emit_rex(0,0,0,(dreg));
1346 *(cd->mcodeptr++) = 0x83;
1347 emit_reg((opc),(dreg));
1350 emit_rex(0,0,0,(dreg));
1351 *(cd->mcodeptr++) = 0x81;
1352 emit_reg((opc),(dreg));
1358 void emit_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
1360 emit_rex(1,(basereg),0,0);
1361 *(cd->mcodeptr++) = 0x83;
1362 emit_membase(cd, (basereg),(disp),(opc));
1365 emit_rex(1,(basereg),0,0);
1366 *(cd->mcodeptr++) = 0x81;
1367 emit_membase(cd, (basereg),(disp),(opc));
1373 void emit_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
1375 emit_rex(0,(basereg),0,0);
1376 *(cd->mcodeptr++) = 0x83;
1377 emit_membase(cd, (basereg),(disp),(opc));
1380 emit_rex(0,(basereg),0,0);
1381 *(cd->mcodeptr++) = 0x81;
1382 emit_membase(cd, (basereg),(disp),(opc));
1388 void emit_test_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1389 emit_rex(1,(reg),0,(dreg));
1390 *(cd->mcodeptr++) = 0x85;
1391 emit_reg((reg),(dreg));
1395 void emit_testl_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1396 emit_rex(0,(reg),0,(dreg));
1397 *(cd->mcodeptr++) = 0x85;
1398 emit_reg((reg),(dreg));
1402 void emit_test_imm_reg(codegendata *cd, s8 imm, s8 reg) {
1403 *(cd->mcodeptr++) = 0xf7;
1409 void emit_testw_imm_reg(codegendata *cd, s8 imm, s8 reg) {
1410 *(cd->mcodeptr++) = 0x66;
1411 *(cd->mcodeptr++) = 0xf7;
1417 void emit_testb_imm_reg(codegendata *cd, s8 imm, s8 reg) {
1418 *(cd->mcodeptr++) = 0xf6;
1424 void emit_lea_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
1425 emit_rex(1,(reg),0,(basereg));
1426 *(cd->mcodeptr++) = 0x8d;
1427 emit_membase(cd, (basereg),(disp),(reg));
1431 void emit_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
1432 emit_rex(0,(reg),0,(basereg));
1433 *(cd->mcodeptr++) = 0x8d;
1434 emit_membase(cd, (basereg),(disp),(reg));
1439 void emit_incl_membase(codegendata *cd, s8 basereg, s8 disp)
1441 emit_rex(0,0,0,(basereg));
1442 *(cd->mcodeptr++) = 0xff;
1443 emit_membase(cd, (basereg),(disp),0);
1448 void emit_cltd(codegendata *cd) {
1449 *(cd->mcodeptr++) = 0x99;
1453 void emit_cqto(codegendata *cd) {
1455 *(cd->mcodeptr++) = 0x99;
1460 void emit_imul_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1461 emit_rex(1,(dreg),0,(reg));
1462 *(cd->mcodeptr++) = 0x0f;
1463 *(cd->mcodeptr++) = 0xaf;
1464 emit_reg((dreg),(reg));
1468 void emit_imull_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1469 emit_rex(0,(dreg),0,(reg));
1470 *(cd->mcodeptr++) = 0x0f;
1471 *(cd->mcodeptr++) = 0xaf;
1472 emit_reg((dreg),(reg));
1476 void emit_imul_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
1477 emit_rex(1,(dreg),0,(basereg));
1478 *(cd->mcodeptr++) = 0x0f;
1479 *(cd->mcodeptr++) = 0xaf;
1480 emit_membase(cd, (basereg),(disp),(dreg));
1484 void emit_imull_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
1485 emit_rex(0,(dreg),0,(basereg));
1486 *(cd->mcodeptr++) = 0x0f;
1487 *(cd->mcodeptr++) = 0xaf;
1488 emit_membase(cd, (basereg),(disp),(dreg));
1492 void emit_imul_imm_reg(codegendata *cd, s8 imm, s8 dreg) {
1493 if (IS_IMM8((imm))) {
1494 emit_rex(1,0,0,(dreg));
1495 *(cd->mcodeptr++) = 0x6b;
1499 emit_rex(1,0,0,(dreg));
1500 *(cd->mcodeptr++) = 0x69;
1507 void emit_imul_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) {
1508 if (IS_IMM8((imm))) {
1509 emit_rex(1,(dreg),0,(reg));
1510 *(cd->mcodeptr++) = 0x6b;
1511 emit_reg((dreg),(reg));
1514 emit_rex(1,(dreg),0,(reg));
1515 *(cd->mcodeptr++) = 0x69;
1516 emit_reg((dreg),(reg));
1522 void emit_imull_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) {
1523 if (IS_IMM8((imm))) {
1524 emit_rex(0,(dreg),0,(reg));
1525 *(cd->mcodeptr++) = 0x6b;
1526 emit_reg((dreg),(reg));
1529 emit_rex(0,(dreg),0,(reg));
1530 *(cd->mcodeptr++) = 0x69;
1531 emit_reg((dreg),(reg));
1537 void emit_imul_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) {
1538 if (IS_IMM8((imm))) {
1539 emit_rex(1,(dreg),0,(basereg));
1540 *(cd->mcodeptr++) = 0x6b;
1541 emit_membase(cd, (basereg),(disp),(dreg));
1544 emit_rex(1,(dreg),0,(basereg));
1545 *(cd->mcodeptr++) = 0x69;
1546 emit_membase(cd, (basereg),(disp),(dreg));
1552 void emit_imull_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) {
1553 if (IS_IMM8((imm))) {
1554 emit_rex(0,(dreg),0,(basereg));
1555 *(cd->mcodeptr++) = 0x6b;
1556 emit_membase(cd, (basereg),(disp),(dreg));
1559 emit_rex(0,(dreg),0,(basereg));
1560 *(cd->mcodeptr++) = 0x69;
1561 emit_membase(cd, (basereg),(disp),(dreg));
1567 void emit_idiv_reg(codegendata *cd, s8 reg) {
1568 emit_rex(1,0,0,(reg));
1569 *(cd->mcodeptr++) = 0xf7;
1574 void emit_idivl_reg(codegendata *cd, s8 reg) {
1575 emit_rex(0,0,0,(reg));
1576 *(cd->mcodeptr++) = 0xf7;
1582 void emit_ret(codegendata *cd) {
1583 *(cd->mcodeptr++) = 0xc3;
1591 void emit_shift_reg(codegendata *cd, s8 opc, s8 reg) {
1592 emit_rex(1,0,0,(reg));
1593 *(cd->mcodeptr++) = 0xd3;
1594 emit_reg((opc),(reg));
1598 void emit_shiftl_reg(codegendata *cd, s8 opc, s8 reg) {
1599 emit_rex(0,0,0,(reg));
1600 *(cd->mcodeptr++) = 0xd3;
1601 emit_reg((opc),(reg));
1605 void emit_shift_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) {
1606 emit_rex(1,0,0,(basereg));
1607 *(cd->mcodeptr++) = 0xd3;
1608 emit_membase(cd, (basereg),(disp),(opc));
1612 void emit_shiftl_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) {
1613 emit_rex(0,0,0,(basereg));
1614 *(cd->mcodeptr++) = 0xd3;
1615 emit_membase(cd, (basereg),(disp),(opc));
1619 void emit_shift_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
1621 emit_rex(1,0,0,(dreg));
1622 *(cd->mcodeptr++) = 0xd1;
1623 emit_reg((opc),(dreg));
1625 emit_rex(1,0,0,(dreg));
1626 *(cd->mcodeptr++) = 0xc1;
1627 emit_reg((opc),(dreg));
1633 void emit_shiftl_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
1635 emit_rex(0,0,0,(dreg));
1636 *(cd->mcodeptr++) = 0xd1;
1637 emit_reg((opc),(dreg));
1639 emit_rex(0,0,0,(dreg));
1640 *(cd->mcodeptr++) = 0xc1;
1641 emit_reg((opc),(dreg));
1647 void emit_shift_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
1649 emit_rex(1,0,0,(basereg));
1650 *(cd->mcodeptr++) = 0xd1;
1651 emit_membase(cd, (basereg),(disp),(opc));
1653 emit_rex(1,0,0,(basereg));
1654 *(cd->mcodeptr++) = 0xc1;
1655 emit_membase(cd, (basereg),(disp),(opc));
1661 void emit_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
1663 emit_rex(0,0,0,(basereg));
1664 *(cd->mcodeptr++) = 0xd1;
1665 emit_membase(cd, (basereg),(disp),(opc));
1667 emit_rex(0,0,0,(basereg));
1668 *(cd->mcodeptr++) = 0xc1;
1669 emit_membase(cd, (basereg),(disp),(opc));
1679 void emit_jmp_imm(codegendata *cd, s8 imm) {
1680 *(cd->mcodeptr++) = 0xe9;
1685 void emit_jmp_reg(codegendata *cd, s8 reg) {
1686 emit_rex(0,0,0,(reg));
1687 *(cd->mcodeptr++) = 0xff;
1692 void emit_jcc(codegendata *cd, s8 opc, s8 imm) {
1693 *(cd->mcodeptr++) = 0x0f;
1694 *(cd->mcodeptr++) = (0x80 + (opc));
1701 * conditional set and move operations
1704 /* we need the rex byte to get all low bytes */
1705 void emit_setcc_reg(codegendata *cd, s8 opc, s8 reg) {
1706 *(cd->mcodeptr++) = (0x40 | (((reg) >> 3) & 0x01));
1707 *(cd->mcodeptr++) = 0x0f;
1708 *(cd->mcodeptr++) = (0x90 + (opc));
1713 /* we need the rex byte to get all low bytes */
1714 void emit_setcc_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) {
1715 *(cd->mcodeptr++) = (0x40 | (((basereg) >> 3) & 0x01));
1716 *(cd->mcodeptr++) = 0x0f;
1717 *(cd->mcodeptr++) = (0x90 + (opc));
1718 emit_membase(cd, (basereg),(disp),0);
1722 void emit_cmovcc_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
1724 emit_rex(1,(dreg),0,(reg));
1725 *(cd->mcodeptr++) = 0x0f;
1726 *(cd->mcodeptr++) = (0x40 + (opc));
1727 emit_reg((dreg),(reg));
1731 void emit_cmovccl_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
1733 emit_rex(0,(dreg),0,(reg));
1734 *(cd->mcodeptr++) = 0x0f;
1735 *(cd->mcodeptr++) = (0x40 + (opc));
1736 emit_reg((dreg),(reg));
1741 void emit_neg_reg(codegendata *cd, s8 reg)
1743 emit_rex(1,0,0,(reg));
1744 *(cd->mcodeptr++) = 0xf7;
1749 void emit_negl_reg(codegendata *cd, s8 reg)
1751 emit_rex(0,0,0,(reg));
1752 *(cd->mcodeptr++) = 0xf7;
1757 void emit_push_reg(codegendata *cd, s8 reg) {
1758 emit_rex(0,0,0,(reg));
1759 *(cd->mcodeptr++) = 0x50 + (0x07 & (reg));
1763 void emit_push_imm(codegendata *cd, s8 imm) {
1764 *(cd->mcodeptr++) = 0x68;
1769 void emit_pop_reg(codegendata *cd, s8 reg) {
1770 emit_rex(0,0,0,(reg));
1771 *(cd->mcodeptr++) = 0x58 + (0x07 & (reg));
1775 void emit_xchg_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1776 emit_rex(1,(reg),0,(dreg));
1777 *(cd->mcodeptr++) = 0x87;
1778 emit_reg((reg),(dreg));
1782 void emit_nop(codegendata *cd) {
1783 *(cd->mcodeptr++) = 0x90;
1791 void emit_call_reg(codegendata *cd, s8 reg) {
1792 emit_rex(1,0,0,(reg));
1793 *(cd->mcodeptr++) = 0xff;
1798 void emit_call_imm(codegendata *cd, s8 imm) {
1799 *(cd->mcodeptr++) = 0xe8;
1804 void emit_call_mem(codegendata *cd, ptrint mem)
1806 *(cd->mcodeptr++) = 0xff;
1813 * floating point instructions (SSE2)
1815 void emit_addsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1816 *(cd->mcodeptr++) = 0xf2;
1817 emit_rex(0,(dreg),0,(reg));
1818 *(cd->mcodeptr++) = 0x0f;
1819 *(cd->mcodeptr++) = 0x58;
1820 emit_reg((dreg),(reg));
1824 void emit_addss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1825 *(cd->mcodeptr++) = 0xf3;
1826 emit_rex(0,(dreg),0,(reg));
1827 *(cd->mcodeptr++) = 0x0f;
1828 *(cd->mcodeptr++) = 0x58;
1829 emit_reg((dreg),(reg));
1833 void emit_cvtsi2ssq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1834 *(cd->mcodeptr++) = 0xf3;
1835 emit_rex(1,(dreg),0,(reg));
1836 *(cd->mcodeptr++) = 0x0f;
1837 *(cd->mcodeptr++) = 0x2a;
1838 emit_reg((dreg),(reg));
1842 void emit_cvtsi2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1843 *(cd->mcodeptr++) = 0xf3;
1844 emit_rex(0,(dreg),0,(reg));
1845 *(cd->mcodeptr++) = 0x0f;
1846 *(cd->mcodeptr++) = 0x2a;
1847 emit_reg((dreg),(reg));
1851 void emit_cvtsi2sdq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1852 *(cd->mcodeptr++) = 0xf2;
1853 emit_rex(1,(dreg),0,(reg));
1854 *(cd->mcodeptr++) = 0x0f;
1855 *(cd->mcodeptr++) = 0x2a;
1856 emit_reg((dreg),(reg));
1860 void emit_cvtsi2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1861 *(cd->mcodeptr++) = 0xf2;
1862 emit_rex(0,(dreg),0,(reg));
1863 *(cd->mcodeptr++) = 0x0f;
1864 *(cd->mcodeptr++) = 0x2a;
1865 emit_reg((dreg),(reg));
1869 void emit_cvtss2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1870 *(cd->mcodeptr++) = 0xf3;
1871 emit_rex(0,(dreg),0,(reg));
1872 *(cd->mcodeptr++) = 0x0f;
1873 *(cd->mcodeptr++) = 0x5a;
1874 emit_reg((dreg),(reg));
1878 void emit_cvtsd2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1879 *(cd->mcodeptr++) = 0xf2;
1880 emit_rex(0,(dreg),0,(reg));
1881 *(cd->mcodeptr++) = 0x0f;
1882 *(cd->mcodeptr++) = 0x5a;
1883 emit_reg((dreg),(reg));
1887 void emit_cvttss2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1888 *(cd->mcodeptr++) = 0xf3;
1889 emit_rex(1,(dreg),0,(reg));
1890 *(cd->mcodeptr++) = 0x0f;
1891 *(cd->mcodeptr++) = 0x2c;
1892 emit_reg((dreg),(reg));
1896 void emit_cvttss2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1897 *(cd->mcodeptr++) = 0xf3;
1898 emit_rex(0,(dreg),0,(reg));
1899 *(cd->mcodeptr++) = 0x0f;
1900 *(cd->mcodeptr++) = 0x2c;
1901 emit_reg((dreg),(reg));
1905 void emit_cvttsd2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1906 *(cd->mcodeptr++) = 0xf2;
1907 emit_rex(1,(dreg),0,(reg));
1908 *(cd->mcodeptr++) = 0x0f;
1909 *(cd->mcodeptr++) = 0x2c;
1910 emit_reg((dreg),(reg));
1914 void emit_cvttsd2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1915 *(cd->mcodeptr++) = 0xf2;
1916 emit_rex(0,(dreg),0,(reg));
1917 *(cd->mcodeptr++) = 0x0f;
1918 *(cd->mcodeptr++) = 0x2c;
1919 emit_reg((dreg),(reg));
1923 void emit_divss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1924 *(cd->mcodeptr++) = 0xf3;
1925 emit_rex(0,(dreg),0,(reg));
1926 *(cd->mcodeptr++) = 0x0f;
1927 *(cd->mcodeptr++) = 0x5e;
1928 emit_reg((dreg),(reg));
1932 void emit_divsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
1933 *(cd->mcodeptr++) = 0xf2;
1934 emit_rex(0,(dreg),0,(reg));
1935 *(cd->mcodeptr++) = 0x0f;
1936 *(cd->mcodeptr++) = 0x5e;
1937 emit_reg((dreg),(reg));
1941 void emit_movd_reg_freg(codegendata *cd, s8 reg, s8 freg) {
1942 *(cd->mcodeptr++) = 0x66;
1943 emit_rex(1,(freg),0,(reg));
1944 *(cd->mcodeptr++) = 0x0f;
1945 *(cd->mcodeptr++) = 0x6e;
1946 emit_reg((freg),(reg));
1950 void emit_movd_freg_reg(codegendata *cd, s8 freg, s8 reg) {
1951 *(cd->mcodeptr++) = 0x66;
1952 emit_rex(1,(freg),0,(reg));
1953 *(cd->mcodeptr++) = 0x0f;
1954 *(cd->mcodeptr++) = 0x7e;
1955 emit_reg((freg),(reg));
1959 void emit_movd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
1960 *(cd->mcodeptr++) = 0x66;
1961 emit_rex(0,(reg),0,(basereg));
1962 *(cd->mcodeptr++) = 0x0f;
1963 *(cd->mcodeptr++) = 0x7e;
1964 emit_membase(cd, (basereg),(disp),(reg));
1968 void emit_movd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
1969 *(cd->mcodeptr++) = 0x66;
1970 emit_rex(0,(reg),(indexreg),(basereg));
1971 *(cd->mcodeptr++) = 0x0f;
1972 *(cd->mcodeptr++) = 0x7e;
1973 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1977 void emit_movd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
1978 *(cd->mcodeptr++) = 0x66;
1979 emit_rex(1,(dreg),0,(basereg));
1980 *(cd->mcodeptr++) = 0x0f;
1981 *(cd->mcodeptr++) = 0x6e;
1982 emit_membase(cd, (basereg),(disp),(dreg));
1986 void emit_movdl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
1987 *(cd->mcodeptr++) = 0x66;
1988 emit_rex(0,(dreg),0,(basereg));
1989 *(cd->mcodeptr++) = 0x0f;
1990 *(cd->mcodeptr++) = 0x6e;
1991 emit_membase(cd, (basereg),(disp),(dreg));
1995 void emit_movd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) {
1996 *(cd->mcodeptr++) = 0x66;
1997 emit_rex(0,(dreg),(indexreg),(basereg));
1998 *(cd->mcodeptr++) = 0x0f;
1999 *(cd->mcodeptr++) = 0x6e;
2000 emit_memindex(cd, (dreg),(disp),(basereg),(indexreg),(scale));
2004 void emit_movq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2005 *(cd->mcodeptr++) = 0xf3;
2006 emit_rex(0,(dreg),0,(reg));
2007 *(cd->mcodeptr++) = 0x0f;
2008 *(cd->mcodeptr++) = 0x7e;
2009 emit_reg((dreg),(reg));
2013 void emit_movq_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
2014 *(cd->mcodeptr++) = 0x66;
2015 emit_rex(0,(reg),0,(basereg));
2016 *(cd->mcodeptr++) = 0x0f;
2017 *(cd->mcodeptr++) = 0xd6;
2018 emit_membase(cd, (basereg),(disp),(reg));
2022 void emit_movq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2023 *(cd->mcodeptr++) = 0xf3;
2024 emit_rex(0,(dreg),0,(basereg));
2025 *(cd->mcodeptr++) = 0x0f;
2026 *(cd->mcodeptr++) = 0x7e;
2027 emit_membase(cd, (basereg),(disp),(dreg));
2031 void emit_movss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2032 *(cd->mcodeptr++) = 0xf3;
2033 emit_rex(0,(reg),0,(dreg));
2034 *(cd->mcodeptr++) = 0x0f;
2035 *(cd->mcodeptr++) = 0x10;
2036 emit_reg((reg),(dreg));
2040 void emit_movsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2041 *(cd->mcodeptr++) = 0xf2;
2042 emit_rex(0,(reg),0,(dreg));
2043 *(cd->mcodeptr++) = 0x0f;
2044 *(cd->mcodeptr++) = 0x10;
2045 emit_reg((reg),(dreg));
2049 void emit_movss_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
2050 *(cd->mcodeptr++) = 0xf3;
2051 emit_rex(0,(reg),0,(basereg));
2052 *(cd->mcodeptr++) = 0x0f;
2053 *(cd->mcodeptr++) = 0x11;
2054 emit_membase(cd, (basereg),(disp),(reg));
2058 /* Always emit a REX byte, because the instruction size can be smaller when */
2059 /* all register indexes are smaller than 7. */
2060 void emit_movss_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
2061 *(cd->mcodeptr++) = 0xf3;
2062 emit_byte_rex((reg),0,(basereg));
2063 *(cd->mcodeptr++) = 0x0f;
2064 *(cd->mcodeptr++) = 0x11;
2065 emit_membase32(cd, (basereg),(disp),(reg));
2069 void emit_movsd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
2070 *(cd->mcodeptr++) = 0xf2;
2071 emit_rex(0,(reg),0,(basereg));
2072 *(cd->mcodeptr++) = 0x0f;
2073 *(cd->mcodeptr++) = 0x11;
2074 emit_membase(cd, (basereg),(disp),(reg));
2078 /* Always emit a REX byte, because the instruction size can be smaller when */
2079 /* all register indexes are smaller than 7. */
2080 void emit_movsd_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
2081 *(cd->mcodeptr++) = 0xf2;
2082 emit_byte_rex((reg),0,(basereg));
2083 *(cd->mcodeptr++) = 0x0f;
2084 *(cd->mcodeptr++) = 0x11;
2085 emit_membase32(cd, (basereg),(disp),(reg));
2089 void emit_movss_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2090 *(cd->mcodeptr++) = 0xf3;
2091 emit_rex(0,(dreg),0,(basereg));
2092 *(cd->mcodeptr++) = 0x0f;
2093 *(cd->mcodeptr++) = 0x10;
2094 emit_membase(cd, (basereg),(disp),(dreg));
2098 /* Always emit a REX byte, because the instruction size can be smaller when */
2099 /* all register indexes are smaller than 7. */
2100 void emit_movss_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2101 *(cd->mcodeptr++) = 0xf3;
2102 emit_byte_rex((dreg),0,(basereg));
2103 *(cd->mcodeptr++) = 0x0f;
2104 *(cd->mcodeptr++) = 0x10;
2105 emit_membase32(cd, (basereg),(disp),(dreg));
2109 void emit_movlps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg)
2111 emit_rex(0,(dreg),0,(basereg));
2112 *(cd->mcodeptr++) = 0x0f;
2113 *(cd->mcodeptr++) = 0x12;
2114 emit_membase(cd, (basereg),(disp),(dreg));
2118 void emit_movlps_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp)
2120 emit_rex(0,(reg),0,(basereg));
2121 *(cd->mcodeptr++) = 0x0f;
2122 *(cd->mcodeptr++) = 0x13;
2123 emit_membase(cd, (basereg),(disp),(reg));
2127 void emit_movsd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2128 *(cd->mcodeptr++) = 0xf2;
2129 emit_rex(0,(dreg),0,(basereg));
2130 *(cd->mcodeptr++) = 0x0f;
2131 *(cd->mcodeptr++) = 0x10;
2132 emit_membase(cd, (basereg),(disp),(dreg));
2136 /* Always emit a REX byte, because the instruction size can be smaller when */
2137 /* all register indexes are smaller than 7. */
2138 void emit_movsd_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2139 *(cd->mcodeptr++) = 0xf2;
2140 emit_byte_rex((dreg),0,(basereg));
2141 *(cd->mcodeptr++) = 0x0f;
2142 *(cd->mcodeptr++) = 0x10;
2143 emit_membase32(cd, (basereg),(disp),(dreg));
2147 void emit_movlpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg)
2149 *(cd->mcodeptr++) = 0x66;
2150 emit_rex(0,(dreg),0,(basereg));
2151 *(cd->mcodeptr++) = 0x0f;
2152 *(cd->mcodeptr++) = 0x12;
2153 emit_membase(cd, (basereg),(disp),(dreg));
2157 void emit_movlpd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp)
2159 *(cd->mcodeptr++) = 0x66;
2160 emit_rex(0,(reg),0,(basereg));
2161 *(cd->mcodeptr++) = 0x0f;
2162 *(cd->mcodeptr++) = 0x13;
2163 emit_membase(cd, (basereg),(disp),(reg));
2167 void emit_movss_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
2168 *(cd->mcodeptr++) = 0xf3;
2169 emit_rex(0,(reg),(indexreg),(basereg));
2170 *(cd->mcodeptr++) = 0x0f;
2171 *(cd->mcodeptr++) = 0x11;
2172 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
2176 void emit_movsd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
2177 *(cd->mcodeptr++) = 0xf2;
2178 emit_rex(0,(reg),(indexreg),(basereg));
2179 *(cd->mcodeptr++) = 0x0f;
2180 *(cd->mcodeptr++) = 0x11;
2181 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
2185 void emit_movss_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) {
2186 *(cd->mcodeptr++) = 0xf3;
2187 emit_rex(0,(dreg),(indexreg),(basereg));
2188 *(cd->mcodeptr++) = 0x0f;
2189 *(cd->mcodeptr++) = 0x10;
2190 emit_memindex(cd, (dreg),(disp),(basereg),(indexreg),(scale));
2194 void emit_movsd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) {
2195 *(cd->mcodeptr++) = 0xf2;
2196 emit_rex(0,(dreg),(indexreg),(basereg));
2197 *(cd->mcodeptr++) = 0x0f;
2198 *(cd->mcodeptr++) = 0x10;
2199 emit_memindex(cd, (dreg),(disp),(basereg),(indexreg),(scale));
2203 void emit_mulss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2204 *(cd->mcodeptr++) = 0xf3;
2205 emit_rex(0,(dreg),0,(reg));
2206 *(cd->mcodeptr++) = 0x0f;
2207 *(cd->mcodeptr++) = 0x59;
2208 emit_reg((dreg),(reg));
2212 void emit_mulsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2213 *(cd->mcodeptr++) = 0xf2;
2214 emit_rex(0,(dreg),0,(reg));
2215 *(cd->mcodeptr++) = 0x0f;
2216 *(cd->mcodeptr++) = 0x59;
2217 emit_reg((dreg),(reg));
2221 void emit_subss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2222 *(cd->mcodeptr++) = 0xf3;
2223 emit_rex(0,(dreg),0,(reg));
2224 *(cd->mcodeptr++) = 0x0f;
2225 *(cd->mcodeptr++) = 0x5c;
2226 emit_reg((dreg),(reg));
2230 void emit_subsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2231 *(cd->mcodeptr++) = 0xf2;
2232 emit_rex(0,(dreg),0,(reg));
2233 *(cd->mcodeptr++) = 0x0f;
2234 *(cd->mcodeptr++) = 0x5c;
2235 emit_reg((dreg),(reg));
2239 void emit_ucomiss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2240 emit_rex(0,(dreg),0,(reg));
2241 *(cd->mcodeptr++) = 0x0f;
2242 *(cd->mcodeptr++) = 0x2e;
2243 emit_reg((dreg),(reg));
2247 void emit_ucomisd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2248 *(cd->mcodeptr++) = 0x66;
2249 emit_rex(0,(dreg),0,(reg));
2250 *(cd->mcodeptr++) = 0x0f;
2251 *(cd->mcodeptr++) = 0x2e;
2252 emit_reg((dreg),(reg));
2256 void emit_xorps_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2257 emit_rex(0,(dreg),0,(reg));
2258 *(cd->mcodeptr++) = 0x0f;
2259 *(cd->mcodeptr++) = 0x57;
2260 emit_reg((dreg),(reg));
2264 void emit_xorps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2265 emit_rex(0,(dreg),0,(basereg));
2266 *(cd->mcodeptr++) = 0x0f;
2267 *(cd->mcodeptr++) = 0x57;
2268 emit_membase(cd, (basereg),(disp),(dreg));
2272 void emit_xorpd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
2273 *(cd->mcodeptr++) = 0x66;
2274 emit_rex(0,(dreg),0,(reg));
2275 *(cd->mcodeptr++) = 0x0f;
2276 *(cd->mcodeptr++) = 0x57;
2277 emit_reg((dreg),(reg));
2281 void emit_xorpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
2282 *(cd->mcodeptr++) = 0x66;
2283 emit_rex(0,(dreg),0,(basereg));
2284 *(cd->mcodeptr++) = 0x0f;
2285 *(cd->mcodeptr++) = 0x57;
2286 emit_membase(cd, (basereg),(disp),(dreg));
2290 /* system instructions ********************************************************/
2292 void emit_rdtsc(codegendata *cd)
2294 *(cd->mcodeptr++) = 0x0f;
2295 *(cd->mcodeptr++) = 0x31;
2300 * These are local overrides for various environment variables in Emacs.
2301 * Please do not remove this and leave it at the end of the file, where
2302 * Emacs will automagically detect them.
2303 * ---------------------------------------------------------------------
2306 * indent-tabs-mode: t