1 /* src/vm/jit/sparc64/md.c - machine dependent SPARC functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/sparc64/md-abi.h"
37 #include "vm/exceptions.h"
38 #include "vm/stringlocal.h"
40 #include "vm/jit/asmpart.h"
41 #include "vm/jit/codegen-common.h"
42 #include "vm/jit/jit.h"
45 /* assembler function prototypes **********************************************/
46 void asm_store_fp_state_reg(u8 *mem);
47 void asm_load_fp_state_reg(u8 *mem);
51 /* shift away 13-bit immediate, mask rd and rs1 */
52 #define SHIFT_AND_MASK(instr) \
53 ((instr >> 13) & 0x60fc1)
55 /* NOP is defined as a SETHI instruction with rd and imm. set to zero */
56 /* therefore we check if the 22-bit immediate is zero */
57 #define IS_SETHI(instr) \
58 (((instr & 0xc1c00000) == 0x01000000) \
59 && ((instr & 0x3fffff) != 0x0))
61 #define IS_LDX_IMM(instr) \
62 (((instr >> 13) & 0x60fc1) == 0x602c1)
64 #define IS_SUB(instr) \
65 (((instr >> 13) & 0x60fc0) == 0x40100)
67 inline s2 decode_13bit_imm(u4 instr) {
70 /* mask everything else in the instruction */
71 imm = instr & 0x00001fff;
73 /* sign extend 13-bit to 16-bit */
80 /* md_init *********************************************************************
82 Do some machine dependent initialization.
84 *******************************************************************************/
92 /* md_stacktrace_get_returnaddress *********************************************
94 Returns the return address of the current stackframe, specified by
95 the passed stack pointer and the stack frame size.
97 *******************************************************************************/
99 u1 *md_stacktrace_get_returnaddress(u1 *sp, u4 framesize)
102 /* flush register windows to the stack */
105 /* the return address resides in register i7, the last register in the
106 * 16-extended-word save area
108 ra = *((u1 **) (sp + 120 + BIAS));
110 /* NOTE: on SPARC ra is the address of the call instruction */
115 u1 *md_get_framepointer(u1 *sp)
118 /* flush register windows to the stack */
121 fp = *((u1 **) (sp + 112 + BIAS));
126 u1 *md_get_pv_from_stackframe(u1 *sp)
129 /* flush register windows to the stack */
132 pv = *((u1 **) (sp + 104 + BIAS));
138 /* md_codegen_get_pv_from_pc ***************************************************
140 This reconstructs and returns the PV of a method given a return address
141 pointer. (basically, same was as the generated code following the jump does)
147 277afffe ldah pv,-2(ra)
148 237ba61c lda pv,-23012(pv)
150 *******************************************************************************/
152 u1 *md_codegen_get_pv_from_pc(u1 *ra)
160 /* get the instruction word after jump and nop */
161 mcode = *((u4 *) (ra+8) );
163 /* check if we have a sethi insruction */
164 if (IS_SETHI(mcode)) {
167 /* get 22-bit immediate of sethi instruction */
168 offset = (s4) (mcode & 0x3fffff);
169 offset = offset << 10;
172 mcode = *((u4 *) (ra+12) );
173 xor_imm = decode_13bit_imm(mcode);
180 mcode_masked = SHIFT_AND_MASK(mcode);
182 assert(mcode_masked == 0x40001);
184 /* mask and extend the negative sign for the 13 bit immediate */
185 offset = decode_13bit_imm(mcode);
194 /* md_jit_method_patch_address *************************************************
196 Gets the patch address of the currently compiled method. The offset
197 is extracted from the load instruction(s) before the jump and added
198 to the right base address (PV or REG_METHODPTR).
200 INVOKESTATIC/SPECIAL:
202 ???????? ldx [i5 - 72],o5
203 ???????? jmp o5 <-- ra
206 w/ sethi (mptr in dseg out of 13-bit simm range)
208 ???????? sethi hi(0x2000),o5
209 ???????? sub i5,o5,o5
210 ???????? ldx [o5 - 72],o5
211 ???????? jmp o5 <-- ra
216 ???????? ldx [o0 + 0},g2
217 ???????? ldx [g2 + 0],o5
218 ???????? jmp o5 <-- ra
223 ???????? ldx [o0 + 0},g2
224 ???????? ldx [g2 - 112],g2
225 ???????? ldx [g2 + 24],o5
226 ???????? jmp o5 <-- ra
229 *******************************************************************************/
231 void *md_jit_method_patch_address(void *pv, void *ra, void *mptr)
234 uint32_t mcode, mcode_sethi, mcode_masked;
239 /* Go back to the location of a possible sethi (3 instruction
242 pc = ((uint32_t *) ra) - 3;
244 /* note: ra is the address of the jump instruction on SPARC */
248 /* check for sethi instruction */
250 if (IS_SETHI(mcode_sethi)) {
251 u4 mcode_sub, mcode_ldx;
256 /* make sure the sequence of instructions is a loadhi */
257 if ((IS_SUB(mcode_sub)) && (IS_LDX_IMM(mcode_ldx)))
261 /* get 22-bit immediate of sethi instruction */
263 disp = (int32_t) (mcode_sethi & 0x3fffff);
266 /* goto next instruction */
268 /* make sure it's a sub instruction (pv - big_disp) */
269 assert(IS_SUB(mcode_sub));
272 /* get displacement of load instruction */
274 assert(IS_LDX_IMM(mcode_ldx));
276 disp += decode_13bit_imm(mcode_ldx);
278 pa = ((uint8_t *) pv) + disp;
284 /* we didn't find a sethi, or it didn't belong to a loadhi */
285 /* check for simple (one-instruction) load */
289 /* shift and mask rd */
291 mcode_masked = (mcode >> 13) & 0x060fff;
293 /* get the offset from the instruction */
295 disp = decode_13bit_imm(mcode);
297 /* check for call with rs1 == REG_METHODPTR: ldx [g2+x],pv_caller */
299 if (mcode_masked == 0x0602c5) {
300 /* in this case we use the passed method pointer */
302 /* return NULL if no mptr was specified (used for replacement) */
307 pa = ((uint8_t *) mptr) + disp;
310 /* in the normal case we check for a `ldx [i5+x],pv_caller' instruction */
312 assert(mcode_masked == 0x0602fb);
314 /* and get the final data segment address */
316 pa = ((uint8_t *) pv) + disp;
323 /* md_cacheflush ***************************************************************
325 Calls the system's function to flush the instruction and data
328 *******************************************************************************/
330 void md_cacheflush(u1 *addr, s4 nbytes)
336 /* md_dcacheflush **************************************************************
338 Calls the system's function to flush the data cache.
340 *******************************************************************************/
342 void md_dcacheflush(u1 *addr, s4 nbytes)
344 /* XXX don't know yet */
345 /* printf("md_dcacheflush\n"); */
346 __asm__ __volatile__ ( "membar 0x7F" : : : "memory" );
350 /* md_patch_replacement_point **************************************************
352 Patch the given replacement point.
354 *******************************************************************************/
356 #if defined(ENABLE_REPLACEMENT)
357 void md_patch_replacement_point(u1 *pc, u1 *savedmcode, bool revert)
362 /* restore the patched-over instruction */
363 *(u4*)(pc) = *(u4*)(savedmcode);
366 /* save the current machine code */
367 *(u4*)(savedmcode) = *(u4*)(pc);
369 /* build the machine code for the patch */
370 assert(0); /* XXX build trap instruction below */
373 /* write the new machine code */
374 *(u4*)(pc) = (u4) mcode;
377 /* flush instruction cache */
378 /* md_icacheflush(pc,4); */
380 #endif /* defined(ENABLE_REPLACEMENT) */
383 * These are local overrides for various environment variables in Emacs.
384 * Please do not remove this and leave it at the end of the file, where
385 * Emacs will automagically detect them.
386 * ---------------------------------------------------------------------
389 * indent-tabs-mode: t
393 * vim:noexpandtab:sw=4:ts=4: