src/vm/jit/sparc64/emit.c

   1 /* src/vm/jit/sparc64/emit.c - SPARC code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29
  30 #include "vm/types.h"
  31
  32 #include "vm/jit/sparc64/codegen.h"
  33 #include "vm/jit/sparc64/md-abi.h"
  34 #include "vm/jit/sparc64/emit.h"
  35
  36 #include "mm/memory.h"
  37
  38 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
  39 #include "vm/jit/abi.h"
  40 #include "vm/jit/abi-asm.h"
  41 #include "vm/jit/asmpart.h"
  42 #include "vm/builtin.h"
  43 #include "vm/jit/dseg.h"
  44 #include "vm/jit/emit-common.h"
  45 #include "vm/jit/jit.h"
  46 #include "vm/jit/replace.h"
  47
  48 #include "vmcore/options.h"
  49
  50 #include "vm/jit/sparc64/solaris/macro_rename.h"
  51
  52 /* how to leaf optimization in the emitted stubs?? */
  53 #define REG_PV REG_PV_CALLEE
  54
  55
  56 /* emit_load *******************************************************************
  57
  58    Emits a possible load of an operand.
  59
  60 *******************************************************************************/
  61
  62 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  63 {
  64         codegendata  *cd;
  65         s4            disp;
  66         s4            reg;
  67
  68         /* get required compiler data */
  69
  70         cd = jd->cd;
  71
  72         if (src->flags & INMEMORY) {
  73                 COUNT_READ_SPILLS(src)
  74
  75                 disp = JITSTACK + src->vv.regoff;
  76
  77                 switch(src->type)
  78                 {
  79                 case TYPE_INT:
  80                 case TYPE_LNG:
  81                 case TYPE_ADR:
  82                         M_LDX(tempreg, REG_SP, disp);
  83                         break;
  84                 case TYPE_FLT:
  85                 case TYPE_DBL:
  86                         M_DLD(tempreg, REG_SP, disp);
  87                         break;
  88                 default:
  89                         vm_abort("emit_load: unknown type %d", src->type);
  90                         break;
  91                 }
  92
  93                 reg = tempreg;
  94         }
  95         else
  96                 reg = src->vv.regoff;
  97
  98         return reg;
  99 }
 100
 101
 102 /* emit_store ******************************************************************
 103
 104    Emits a possible store to variable.
 105
 106 *******************************************************************************/
 107
 108 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 109 {
 110         codegendata  *cd;
 111         s4            disp;
 112
 113         /* get required compiler data */
 114
 115         cd = jd->cd;
 116
 117         if (dst->flags & INMEMORY) {
 118                 COUNT_WRITE_SPILLS(dst)
 119
 120                 disp = JITSTACK + dst->vv.regoff;
 121
 122                 switch(dst->type)
 123                 {
 124                 case TYPE_INT:
 125                 case TYPE_LNG:
 126                 case TYPE_ADR:
 127                         M_STX(d, REG_SP, disp);
 128                         break;
 129                 case TYPE_FLT:
 130                 case TYPE_DBL:
 131                         M_DST(d, REG_SP, disp);
 132                         break;
 133                 default:
 134                         vm_abort("emit_store: unknown type %d", dst->type);
 135                         break;
 136                 }
 137         }
 138 }
 139
 140
 141 /* emit_copy *******************************************************************
 142
 143    Generates a register/memory to register/memory copy.
 144
 145 *******************************************************************************/
 146
 147 void emit_copy(jitdata *jd, instruction *iptr)
 148 {
 149         codegendata *cd;
 150         varinfo     *src;
 151         varinfo     *dst;
 152         s4           s1, d;
 153
 154         /* get required compiler data */
 155
 156         cd = jd->cd;
 157
 158         /* get source and destination variables */
 159
 160         src = VAROP(iptr->s1);
 161         dst = VAROP(iptr->dst);
 162
 163         if ((src->vv.regoff != dst->vv.regoff) ||
 164                 ((src->flags ^ dst->flags) & INMEMORY)) {
 165
 166                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 167                         /* emit nothing, as the value won't be used anyway */
 168                         return;
 169                 }
 170
 171                 /* If one of the variables resides in memory, we can eliminate
 172                    the register move from/to the temporary register with the
 173                    order of getting the destination register and the load. */
 174
 175                 if (IS_INMEMORY(src->flags)) {
 176                         d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 177                         s1 = emit_load(jd, iptr, src, d);
 178                 }
 179                 else {
 180                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 181                         d  = codegen_reg_of_var(iptr->opc, dst, s1);
 182                 }
 183
 184                 if (s1 != d) {
 185                         switch(src->type) {
 186                         case TYPE_INT:
 187                         case TYPE_LNG:
 188                         case TYPE_ADR:
 189                                 M_MOV(s1, d);
 190                                 break;
 191                         case TYPE_FLT:
 192                         case TYPE_DBL:
 193                                 M_DMOV(s1, d);
 194                                 break;
 195                         default:
 196                                 vm_abort("emit_copy: unknown type %d", src->type);
 197                                 break;
 198                         }
 199                 }
 200
 201                 emit_store(jd, iptr, dst, d);
 202         }
 203 }
 204
 205
 206 /* emit_iconst *****************************************************************
 207
 208    XXX
 209
 210 *******************************************************************************/
 211
 212 void emit_iconst(codegendata *cd, s4 d, s4 value)
 213 {
 214         s4 disp;
 215
 216         if ((value >= -4096) && (value <= 4095)) {
 217                 M_XOR_IMM(REG_ZERO, value, d);
 218         } else {
 219                 disp = dseg_add_s4(cd, value);
 220                 M_ILD(d, REG_PV_CALLEE, disp);
 221         }
 222 }
 223
 224
 225 /* emit_lconst *****************************************************************
 226
 227    XXX
 228
 229 *******************************************************************************/
 230
 231 void emit_lconst(codegendata *cd, s4 d, s8 value)
 232 {
 233         s4 disp;
 234
 235         if ((value >= -4096) && (value <= 4095)) {
 236                 M_XOR_IMM(REG_ZERO, value, d);
 237         } else {
 238                 disp = dseg_add_s8(cd, value);
 239                 M_LDX(d, REG_PV_CALLEE, disp);
 240         }
 241 }
 242
 243 /* emit_branch *****************************************************************
 244
 245    Emits the code for conditional and unconditional branchs.
 246
 247 *******************************************************************************/
 248
 249 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 250 {
 251         s4 branchdisp;
 252
 253         /* calculate the different displacements */
 254
 255         branchdisp = disp >> 2;
 256
 257         /* check which branch to generate */
 258
 259         if (condition == BRANCH_UNCONDITIONAL) {
 260                 /* check displacement for overflow (19-bit)*/
 261
 262                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 263                         /* if the long-branches flag isn't set yet, do it */
 264
 265                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 266                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 267                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 268                         }
 269
 270                         vm_abort("emit_branch: emit unconditional long-branch code");
 271                 }
 272                 else {
 273                         M_BR(branchdisp);
 274                         M_NOP;
 275                 }
 276         }
 277         else if (reg == -1) {
 278                 /* branch on condition codes */
 279
 280                 /* check displacement for overflow (19-bit)*/
 281
 282                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 283                         /* if the long-branches flag isn't set yet, do it */
 284
 285                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 286                                 log_println("setting error");
 287                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 288                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 289                         }
 290
 291                         vm_abort("emit_branch: emit long-branch on cc code");
 292                 }
 293                 else {
 294                         /* check whether to branch on 64-bit condition code */
 295                         if (BRANCH_CHECKS_XCC(opt)) {
 296                                 switch (condition) {
 297                                 case BRANCH_EQ:
 298                                         M_XBEQ(branchdisp);
 299                                         break;
 300                                 case BRANCH_NE:
 301                                         M_XBNE(branchdisp);
 302                                         break;
 303                                 case BRANCH_LT:
 304                                         M_XBLT(branchdisp);
 305                                         break;
 306                                 case BRANCH_GE:
 307                                         M_XBGE(branchdisp);
 308                                         break;
 309                                 case BRANCH_GT:
 310                                         M_XBGT(branchdisp);
 311                                         break;
 312                                 case BRANCH_LE:
 313                                         M_XBLE(branchdisp);
 314                                         break;
 315                                 case BRANCH_UGT:
 316                                         M_XBUGT(branchdisp);
 317                                         break;
 318                                 case BRANCH_ULT:
 319                                         M_XBULT(branchdisp);
 320                                         break;
 321                                 default:
 322                                         vm_abort("emit_branch: unknown condition %d", condition);
 323                                 }
 324
 325                                 /* branch delay */
 326                                 M_NOP;
 327                         }
 328                         else {
 329                                 switch (condition) {
 330                                 case BRANCH_EQ:
 331                                         M_BEQ(branchdisp);
 332                                         break;
 333                                 case BRANCH_NE:
 334                                         M_BNE(branchdisp);
 335                                         break;
 336                                 case BRANCH_LT:
 337                                         M_BLT(branchdisp);
 338                                         break;
 339                                 case BRANCH_GE:
 340                                         M_BGE(branchdisp);
 341                                         break;
 342                                 case BRANCH_GT:
 343                                         M_BGT(branchdisp);
 344                                         break;
 345                                 case BRANCH_LE:
 346                                         M_BLE(branchdisp);
 347                                         break;
 348                                 case BRANCH_UGT:
 349                                         M_BUGT(branchdisp);
 350                                         break;
 351                                 case BRANCH_ULT:
 352                                         M_BULT(branchdisp);
 353                                         break;
 354                                 default:
 355                                         vm_abort("emit_branch: unknown condition %d", condition);
 356                                 }
 357
 358                                 /* branch delay */
 359                                 M_NOP;
 360                         }
 361                 }
 362         }
 363         else {
 364                 /* branch on register */
 365
 366                 /* check displacement for overflow (16-bit) */
 367
 368                 if ((branchdisp < (s4) 0xffff8000) || (branchdisp > (s4) 0x0007fff)) {
 369                         /* if the long-branches flag isn't set yet, do it */
 370
 371                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 372                                 log_println("setting error");
 373                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 374                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 375                         }
 376
 377                         vm_abort("emit_branch: emit long-branch on reg code");
 378                 }
 379                 else {
 380                         switch (condition) {
 381                         case BRANCH_EQ:
 382                                 M_BEQZ(reg, branchdisp);
 383                                 break;
 384                         case BRANCH_NE:
 385                                 M_BNEZ(reg, branchdisp);
 386                                 break;
 387                         case BRANCH_LT:
 388                                 M_BLTZ(reg, branchdisp);
 389                                 break;
 390                         case BRANCH_GE:
 391                                 M_BGEZ(reg, branchdisp);
 392                                 break;
 393                         case BRANCH_GT:
 394                                 M_BGTZ(reg, branchdisp);
 395                                 break;
 396                         case BRANCH_LE:
 397                                 M_BLEZ(reg, branchdisp);
 398                                 break;
 399                         default:
 400                                 vm_abort("emit_branch: unknown condition %d", condition);
 401                         }
 402
 403                         /* branch delay */
 404                         M_NOP;
 405                 }
 406         }
 407 }
 408
 409
 410 /* emit_bxx_xcc*****************************************************************
 411
 412    Wrappers for branches on 64-bit condition codes (SPARC specific).
 413
 414 *******************************************************************************/
 415
 416 void emit_beq_xcc(codegendata *cd, basicblock *target)
 417 {
 418         emit_bcc(cd, target, BRANCH_EQ, BRANCH_OPT_XCC);
 419 }
 420
 421 void emit_bne_xcc(codegendata *cd, basicblock *target)
 422 {
 423         emit_bcc(cd, target, BRANCH_NE, BRANCH_OPT_XCC);
 424 }
 425
 426 void emit_blt_xcc(codegendata *cd, basicblock *target)
 427 {
 428         emit_bcc(cd, target, BRANCH_LT, BRANCH_OPT_XCC);
 429 }
 430
 431 void emit_bge_xcc(codegendata *cd, basicblock *target)
 432 {
 433         emit_bcc(cd, target, BRANCH_GE, BRANCH_OPT_XCC);
 434 }
 435
 436 void emit_bgt_xcc(codegendata *cd, basicblock *target)
 437 {
 438         emit_bcc(cd, target, BRANCH_GT, BRANCH_OPT_XCC);
 439 }
 440
 441 void emit_ble_xcc(codegendata *cd, basicblock *target)
 442 {
 443         emit_bcc(cd, target, BRANCH_LE, BRANCH_OPT_XCC);
 444 }
 445
 446
 447
 448
 449
 450 /* emit_arithmetic_check *******************************************************
 451
 452    Emit an ArithmeticException check.
 453
 454 *******************************************************************************/
 455
 456 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 457 {
 458         if (INSTRUCTION_MUST_CHECK(iptr)) {
 459                 M_BNEZ(reg, 3);
 460                 M_NOP;
 461                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
 462         }
 463 }
 464
 465
 466 /* emit_arrayindexoutofbounds_check ********************************************
 467
 468    Emit an ArrayIndexOutOfBoundsException check.
 469
 470 *******************************************************************************/
 471
 472 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 473 {
 474         if (INSTRUCTION_MUST_CHECK(iptr)) {
 475                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
 476                 M_CMP(s2, REG_ITMP3);
 477                 M_XBULT(3);
 478                 M_NOP;
 479                 M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
 480         }
 481 }
 482
 483
 484 /* emit_arraystore_check *******************************************************
 485
 486    Emit an ArrayStoreException check.
 487
 488 *******************************************************************************/
 489
 490 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 491 {
 492         if (INSTRUCTION_MUST_CHECK(iptr)) {
 493                 M_BNEZ(REG_RESULT_CALLER, 3);
 494                 M_NOP;
 495                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_ArrayStoreException);
 496         }
 497 }
 498
 499
 500 /* emit_classcast_check ********************************************************
 501
 502    Emit a ClassCastException check.
 503
 504 *******************************************************************************/
 505
 506 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 507 {
 508 /* XXX: use 64-bit or 32-bit compares??? */
 509
 510         if (INSTRUCTION_MUST_CHECK(iptr)) {
 511                 switch (condition) {
 512                 case ICMD_IFEQ:
 513                         M_BNEZ(reg, 3);
 514                         break;
 515
 516                 case ICMD_IFLE:
 517                         M_BGTZ(reg, 3);
 518                         break;
 519
 520                 case BRANCH_ULT:
 521                         M_XBUGE(3);
 522                         break;
 523
 524                 default:
 525                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 526                 }
 527
 528                 M_NOP;
 529                 M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
 530         }
 531 }
 532
 533
 534 /* emit_nullpointer_check ******************************************************
 535
 536    Emit a NullPointerException check.
 537
 538 *******************************************************************************/
 539
 540 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 541 {
 542         if (INSTRUCTION_MUST_CHECK(iptr)) {
 543                 M_BNEZ(reg, 3);
 544                 M_NOP;
 545                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 546         }
 547 }
 548
 549
 550 /* emit_exception_check ********************************************************
 551
 552    Emit an Exception check.
 553
 554 *******************************************************************************/
 555
 556 void emit_exception_check(codegendata *cd, instruction *iptr)
 557 {
 558         if (INSTRUCTION_MUST_CHECK(iptr)) {
 559                 M_BNEZ(REG_RESULT_CALLER, 3);
 560                 M_NOP;
 561                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_CHECK_EXCEPTION);
 562         }
 563 }
 564
 565
 566 /* emit_trap *******************************************************************
 567
 568    Emit a trap instruction and return the original machine code.
 569
 570 *******************************************************************************/
 571
 572 uint32_t emit_trap(codegendata *cd)
 573 {
 574         uint32_t mcode;
 575
 576         /* Get machine code which is patched back in later. The
 577            trap is 1 instruction word long. */
 578
 579         mcode = *((uint32_t *) cd->mcodeptr);
 580
 581         M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_PATCHER);
 582
 583         return mcode;
 584 }
 585
 586
 587 /* emit_patcher_stubs **********************************************************
 588
 589    Generates the code for the patcher stubs.
 590
 591 *******************************************************************************/
 592
 593 void emit_patcher_stubs(jitdata *jd)
 594 {
 595         codegendata *cd;
 596         patchref    *pref;
 597         u4           mcode[2];
 598         u1          *savedmcodeptr;
 599         u1          *tmpmcodeptr;
 600         s4           targetdisp;
 601         s4           disp;
 602
 603         /* get required compiler data */
 604
 605         cd = jd->cd;
 606
 607         /* generate code patching stub call code */
 608
 609         targetdisp = 0;
 610
 611         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
 612                 /* check code segment size */
 613
 614                 MCODECHECK(100);
 615
 616                 /* Get machine code which is patched back in later. The
 617                    call is 2 instruction words long. */
 618
 619                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
 620
 621                 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
 622                    SPARC causes a SIGSEGV */
 623
 624                 mcode[0] = ((u4 *) tmpmcodeptr)[0];
 625                 mcode[1] = ((u4 *) tmpmcodeptr)[1];
 626
 627                 /* Patch in the call to call the following code (done at
 628                    compile time). */
 629
 630                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
 631                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
 632
 633                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) );
 634
 635                 if ((disp < (s4) 0xfffc0000) || (disp > (s4) 0x003ffff)) {
 636                         vm_abort("Jump offset is out of range: %d > +/-%d",
 637                                          disp, 0x003ffff);
 638                         return;
 639                 }
 640
 641                 M_BR(disp);
 642                 M_NOP;
 643
 644                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
 645
 646                 /* extend stack frame for wrapper data */
 647
 648                 M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
 649
 650                 /* calculate return address and move it onto the stack */
 651
 652                 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
 653                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 5 * 8);
 654
 655                 /* move pointer to java_objectheader onto stack */
 656
 657 #if defined(ENABLE_THREADS)
 658                 /* create a virtual java_objectheader */
 659
 660                 (void) dseg_add_unique_address(cd, NULL);                  /* flcword */
 661                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
 662                 disp = dseg_add_unique_address(cd, NULL);                  /* vftbl   */
 663
 664                 M_LDA(REG_ITMP3, REG_PV, disp);
 665                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 4 * 8);
 666 #else
 667                 /* do nothing */
 668 #endif
 669
 670                 /* move machine code onto stack */
 671
 672                 disp = dseg_add_s4(cd, mcode[0]);
 673                 M_ILD(REG_ITMP3, REG_PV, disp);
 674                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8);
 675
 676                 disp = dseg_add_s4(cd, mcode[1]);
 677                 M_ILD(REG_ITMP3, REG_PV, disp);
 678                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8 + 4);
 679
 680                 /* move class/method/field reference onto stack */
 681
 682                 disp = dseg_add_address(cd, pref->ref);
 683                 M_ALD(REG_ITMP3, REG_PV, disp);
 684                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 2 * 8);
 685
 686         /* move data segment displacement onto stack */
 687
 688                 disp = dseg_add_s4(cd, pref->disp);
 689                 M_ILD(REG_ITMP3, REG_PV, disp);
 690                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 1 * 8);
 691
 692                 /* move patcher function pointer onto stack */
 693
 694                 disp = dseg_add_functionptr(cd, pref->patcher);
 695                 M_ALD(REG_ITMP3, REG_PV, disp);
 696                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 0 * 8);
 697
 698                 if (targetdisp == 0) {
 699                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
 700
 701                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
 702                         M_ALD(REG_ITMP3, REG_PV, disp);
 703                         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);
 704                         M_NOP;
 705                 }
 706                 else {
 707                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
 708                                 (((u4 *) cd->mcodeptr));
 709
 710                         M_BR(disp);
 711                         M_NOP;
 712                 }
 713         }
 714 }
 715
 716
 717 /* emit_verbosecall_enter ******************************************************
 718
 719    Generates the code for the call trace.
 720
 721 *******************************************************************************/
 722
 723 #if !defined(NDEBUG)
 724 void emit_verbosecall_enter(jitdata *jd)
 725 {
 726         methodinfo   *m;
 727         codegendata  *cd;
 728         registerdata *rd;
 729         methoddesc   *md;
 730         s4            disp;
 731         s4            i, t;
 732         s4            stackslots;
 733
 734         /* get required compiler data */
 735
 736         m  = jd->m;
 737         cd = jd->cd;
 738         rd = jd->rd;
 739
 740         md = m->parseddesc;
 741
 742         /* mark trace code */
 743
 744         M_NOP;
 745
 746         /* XXX jit-c-call */
 747         stackslots = 1 + FLT_ARG_CNT;
 748         ALIGN_STACK_SLOTS(stackslots);
 749
 750         M_LDA(REG_SP, REG_SP, -(stackslots * 8));
 751
 752         /* save float argument registers */
 753
 754         for (i = 0; i < FLT_ARG_CNT; i++)
 755                 M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 756
 757         /* save temporary registers for leaf methods */
 758 /* XXX no leaf optimization yet
 759         if (code_is_leafmethod(code)) {
 760                 for (i = 0; i < INT_TMP_CNT; i++)
 761                         M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 762
 763                 for (i = 0; i < FLT_TMP_CNT; i++)
 764                         M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 765         }
 766 */
 767         /* load int/float arguments into integer argument registers */
 768
 769         for (i = 0; i < md->paramcount && i < INT_NATARG_CNT; i++) {
 770                 t = md->paramtypes[i].type;
 771
 772                 /* all available argument registers used, which adds a little complexity */
 773
 774                 if (IS_INT_LNG_TYPE(t)) {
 775                         if (i < INT_ARG_CNT) {
 776                                 M_INTMOVE(REG_WINDOW_TRANSPOSE(abi_registers_integer_argument[i]),
 777                                         abi_registers_integer_argument[i]);
 778                         }
 779                         else {
 780                                 assert(i == 5);
 781                                 M_LDX(REG_OUT5, REG_FP, JITSTACK);
 782                         }
 783                 }
 784                 else {
 785                         if (i < FLT_ARG_CNT) {
 786
 787                                 /* reg -> mem -> reg */
 788
 789                                 if (IS_2_WORD_TYPE(t)) {
 790                                         M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 791                                         M_LDX(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 792                                 }
 793                                 else {
 794                                         M_FST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 795                                         M_ILD(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 796                                 }
 797                         }
 798                         else {
 799
 800                                 /* mem -> reg */
 801
 802                                 assert(i == 5);
 803                                 if (IS_2_WORD_TYPE(t)) {
 804                                         M_LDX(REG_OUT5, REG_FP, JITSTACK);
 805                                 }
 806                                 else {
 807                                         M_ILD(REG_OUT5, REG_FP, JITSTACK);
 808                                 }
 809                         }
 810                 }
 811         }
 812
 813
 814         /* method info pointer is passed via stack */
 815         disp = dseg_add_address(cd, m);
 816         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 817         M_AST(REG_ITMP1, REG_SP, CSTACK);
 818         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 819         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 820         M_JMP(REG_RA_CALLER, REG_ITMP1, REG_ZERO);
 821         M_NOP;
 822
 823         /* restore float argument registers */
 824
 825         for (i = 0; i < FLT_ARG_CNT; i++)
 826                 M_DLD(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 827
 828         /* restore temporary registers for leaf methods */
 829 /* XXX no leaf optimization yet
 830         if (code_is_leafmethod(code)) {
 831                 for (i = 0; i < INT_TMP_CNT; i++)
 832                         M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 833
 834                 for (i = 0; i < FLT_TMP_CNT; i++)
 835                         M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 836         }
 837 */
 838         M_LDA(REG_SP, REG_SP, stackslots * 8);
 839
 840         /* mark trace code */
 841
 842         M_NOP;
 843 }
 844 #endif /* !defined(NDEBUG) */
 845
 846
 847 /* emit_verbosecall_exit *******************************************************
 848
 849    Generates the code for the call trace.
 850
 851 *******************************************************************************/
 852
 853 #if !defined(NDEBUG)
 854 void emit_verbosecall_exit(jitdata *jd)
 855 {
 856         methodinfo   *m;
 857         codegendata  *cd;
 858         registerdata *rd;
 859         s4            disp;
 860
 861         /* get required compiler data */
 862
 863         m  = jd->m;
 864         cd = jd->cd;
 865         rd = jd->rd;
 866
 867         /* mark trace code */
 868
 869         M_NOP;
 870
 871         /* XXX jit-c-call (keep stack aligned)*/
 872         M_LDA(REG_SP, REG_SP, -(2 * 8));
 873
 874         M_DST(REG_FRESULT, REG_SP, JITSTACK);
 875
 876         M_MOV(REG_RESULT_CALLEE, REG_OUT0);
 877         M_DMOV(REG_FRESULT, 1); /* logical dreg 1 => f2 */
 878         M_FMOV(REG_FRESULT, 2); /* logical freg 2 => f5 */
 879
 880         disp = dseg_add_functionptr(cd, m);
 881         M_ALD(REG_OUT3, REG_PV_CALLEE, disp);
 882
 883         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
 884         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
 885         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
 886         M_NOP;
 887
 888         M_DLD(REG_FRESULT, REG_SP, JITSTACK);
 889
 890         M_LDA(REG_SP, REG_SP, 2 * 8);
 891
 892         /* mark trace code */
 893
 894         M_NOP;
 895 }
 896 #endif /* !defined(NDEBUG) */
 897
 898
 899 /*
 900  * These are local overrides for various environment variables in Emacs.
 901  * Please do not remove this and leave it at the end of the file, where
 902  * Emacs will automagically detect them.
 903  * ---------------------------------------------------------------------
 904  * Local variables:
 905  * mode: c
 906  * indent-tabs-mode: t
 907  * c-basic-offset: 4
 908  * tab-width: 4
 909  * End:
 910  * vim:noexpandtab:sw=4:ts=4:
 911  */