src/vm/jit/sparc64/emit.c

   1 /* src/vm/jit/sparc64/emit.c - SPARC code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25 */
  26
  27
  28 #include "config.h"
  29
  30 #include <assert.h>
  31
  32 #include "vm/types.h"
  33
  34 #include "vm/jit/sparc64/codegen.h"
  35 #include "vm/jit/sparc64/md-abi.h"
  36 #include "vm/jit/sparc64/emit.h"
  37
  38 #include "mm/memory.h"
  39
  40 #include "vm/exceptions.h"
  41 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
  42 #include "vm/jit/abi.h"
  43 #include "vm/jit/abi-asm.h"
  44 #include "vm/jit/asmpart.h"
  45 #include "vm/builtin.h"
  46 #include "vm/jit/dseg.h"
  47 #include "vm/jit/emit-common.h"
  48 #include "vm/jit/jit.h"
  49 #include "vm/jit/replace.h"
  50
  51 #include "vmcore/options.h"
  52
  53 #include "vm/jit/sparc64/solaris/macro_rename.h"
  54
  55 /* how to leaf optimization in the emitted stubs?? */
  56 #define REG_PV REG_PV_CALLEE
  57
  58
  59 /* emit_load *******************************************************************
  60
  61    Emits a possible load of an operand.
  62
  63 *******************************************************************************/
  64
  65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  66 {
  67         codegendata  *cd;
  68         s4            disp;
  69         s4            reg;
  70
  71         /* get required compiler data */
  72
  73         cd = jd->cd;
  74
  75         if (src->flags & INMEMORY) {
  76                 COUNT_READ_SPILLS(src)
  77
  78                 disp = JITSTACK + src->vv.regoff;
  79
  80                 switch(src->type)
  81                 {
  82                 case TYPE_INT:
  83                 case TYPE_LNG:
  84                 case TYPE_ADR:
  85                         M_LDX(tempreg, REG_SP, disp);
  86                         break;
  87                 case TYPE_FLT:
  88                 case TYPE_DBL:
  89                         M_DLD(tempreg, REG_SP, disp);
  90                         break;
  91                 default:
  92                         vm_abort("emit_load: unknown type %d", src->type);
  93                         break;
  94                 }
  95
  96                 reg = tempreg;
  97         }
  98         else
  99                 reg = src->vv.regoff;
 100
 101         return reg;
 102 }
 103
 104
 105 /* emit_store ******************************************************************
 106
 107    Emits a possible store to variable.
 108
 109 *******************************************************************************/
 110
 111 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 112 {
 113         codegendata  *cd;
 114         s4            disp;
 115
 116         /* get required compiler data */
 117
 118         cd = jd->cd;
 119
 120         if (dst->flags & INMEMORY) {
 121                 COUNT_WRITE_SPILLS(dst)
 122
 123                 disp = JITSTACK + dst->vv.regoff;
 124
 125                 switch(dst->type)
 126                 {
 127                 case TYPE_INT:
 128                 case TYPE_LNG:
 129                 case TYPE_ADR:
 130                         M_STX(d, REG_SP, disp);
 131                         break;
 132                 case TYPE_FLT:
 133                 case TYPE_DBL:
 134                         M_DST(d, REG_SP, disp);
 135                         break;
 136                 default:
 137                         vm_abort("emit_store: unknown type %d", dst->type);
 138                         break;
 139                 }
 140         }
 141 }
 142
 143
 144 /* emit_copy *******************************************************************
 145
 146    Generates a register/memory to register/memory copy.
 147
 148 *******************************************************************************/
 149
 150 void emit_copy(jitdata *jd, instruction *iptr)
 151 {
 152         codegendata *cd;
 153         varinfo     *src;
 154         varinfo     *dst;
 155         s4           s1, d;
 156
 157         /* get required compiler data */
 158
 159         cd = jd->cd;
 160
 161         /* get source and destination variables */
 162
 163         src = VAROP(iptr->s1);
 164         dst = VAROP(iptr->dst);
 165
 166         if ((src->vv.regoff != dst->vv.regoff) ||
 167                 ((src->flags ^ dst->flags) & INMEMORY)) {
 168
 169                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 170                         /* emit nothing, as the value won't be used anyway */
 171                         return;
 172                 }
 173
 174                 /* If one of the variables resides in memory, we can eliminate
 175                    the register move from/to the temporary register with the
 176                    order of getting the destination register and the load. */
 177
 178                 if (IS_INMEMORY(src->flags)) {
 179                         d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 180                         s1 = emit_load(jd, iptr, src, d);
 181                 }
 182                 else {
 183                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 184                         d  = codegen_reg_of_var(iptr->opc, dst, s1);
 185                 }
 186
 187                 if (s1 != d) {
 188                         switch(src->type) {
 189                         case TYPE_INT:
 190                         case TYPE_LNG:
 191                         case TYPE_ADR:
 192                                 M_MOV(s1, d);
 193                                 break;
 194                         case TYPE_FLT:
 195                         case TYPE_DBL:
 196                                 M_DMOV(s1, d);
 197                                 break;
 198                         default:
 199                                 vm_abort("emit_copy: unknown type %d", src->type);
 200                                 break;
 201                         }
 202                 }
 203
 204                 emit_store(jd, iptr, dst, d);
 205         }
 206 }
 207
 208
 209 /* emit_iconst *****************************************************************
 210
 211    XXX
 212
 213 *******************************************************************************/
 214
 215 void emit_iconst(codegendata *cd, s4 d, s4 value)
 216 {
 217         s4 disp;
 218
 219         if ((value >= -4096) && (value <= 4095)) {
 220                 M_XOR_IMM(REG_ZERO, value, d);
 221         } else {
 222                 disp = dseg_add_s4(cd, value);
 223                 M_ILD(d, REG_PV_CALLEE, disp);
 224         }
 225 }
 226
 227
 228 /* emit_lconst *****************************************************************
 229
 230    XXX
 231
 232 *******************************************************************************/
 233
 234 void emit_lconst(codegendata *cd, s4 d, s8 value)
 235 {
 236         s4 disp;
 237
 238         if ((value >= -4096) && (value <= 4095)) {
 239                 M_XOR_IMM(REG_ZERO, value, d);
 240         } else {
 241                 disp = dseg_add_s8(cd, value);
 242                 M_LDX(d, REG_PV_CALLEE, disp);
 243         }
 244 }
 245
 246 /* emit_branch *****************************************************************
 247
 248    Emits the code for conditional and unconditional branchs.
 249
 250 *******************************************************************************/
 251
 252 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 253 {
 254         s4 branchdisp;
 255
 256         /* calculate the different displacements */
 257
 258         branchdisp = disp >> 2;
 259
 260         /* check which branch to generate */
 261
 262         if (condition == BRANCH_UNCONDITIONAL) {
 263                 /* check displacement for overflow (19-bit)*/
 264
 265                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 266                         /* if the long-branches flag isn't set yet, do it */
 267
 268                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 269                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 270                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 271                         }
 272
 273                         vm_abort("emit_branch: emit unconditional long-branch code");
 274                 }
 275                 else {
 276                         M_BR(branchdisp);
 277                         M_NOP;
 278                 }
 279         }
 280         else if (reg == -1) {
 281                 /* branch on condition codes */
 282
 283                 /* check displacement for overflow (19-bit)*/
 284
 285                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 286                         /* if the long-branches flag isn't set yet, do it */
 287
 288                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 289                                 log_println("setting error");
 290                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 291                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 292                         }
 293
 294                         vm_abort("emit_branch: emit long-branch on cc code");
 295                 }
 296                 else {
 297                         /* check whether to branch on 64-bit condition code */
 298                         if (BRANCH_CHECKS_XCC(opt)) {
 299                                 switch (condition) {
 300                                 case BRANCH_EQ:
 301                                         M_XBEQ(branchdisp);
 302                                         break;
 303                                 case BRANCH_NE:
 304                                         M_XBNE(branchdisp);
 305                                         break;
 306                                 case BRANCH_LT:
 307                                         M_XBLT(branchdisp);
 308                                         break;
 309                                 case BRANCH_GE:
 310                                         M_XBGE(branchdisp);
 311                                         break;
 312                                 case BRANCH_GT:
 313                                         M_XBGT(branchdisp);
 314                                         break;
 315                                 case BRANCH_LE:
 316                                         M_XBLE(branchdisp);
 317                                         break;
 318                                 case BRANCH_UGT:
 319                                         M_XBUGT(branchdisp);
 320                                         break;
 321                                 case BRANCH_ULT:
 322                                         M_XBULT(branchdisp);
 323                                         break;
 324                                 default:
 325                                         vm_abort("emit_branch: unknown condition %d", condition);
 326                                 }
 327
 328                                 /* branch delay */
 329                                 M_NOP;
 330                         }
 331                         else {
 332                                 switch (condition) {
 333                                 case BRANCH_EQ:
 334                                         M_BEQ(branchdisp);
 335                                         break;
 336                                 case BRANCH_NE:
 337                                         M_BNE(branchdisp);
 338                                         break;
 339                                 case BRANCH_LT:
 340                                         M_BLT(branchdisp);
 341                                         break;
 342                                 case BRANCH_GE:
 343                                         M_BGE(branchdisp);
 344                                         break;
 345                                 case BRANCH_GT:
 346                                         M_BGT(branchdisp);
 347                                         break;
 348                                 case BRANCH_LE:
 349                                         M_BLE(branchdisp);
 350                                         break;
 351                                 case BRANCH_UGT:
 352                                         M_BUGT(branchdisp);
 353                                         break;
 354                                 case BRANCH_ULT:
 355                                         M_BULT(branchdisp);
 356                                         break;
 357                                 default:
 358                                         vm_abort("emit_branch: unknown condition %d", condition);
 359                                 }
 360
 361                                 /* branch delay */
 362                                 M_NOP;
 363                         }
 364                 }
 365         }
 366         else {
 367                 /* branch on register */
 368
 369                 /* check displacement for overflow (16-bit) */
 370
 371                 if ((branchdisp < (s4) 0xffff8000) || (branchdisp > (s4) 0x0007fff)) {
 372                         /* if the long-branches flag isn't set yet, do it */
 373
 374                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 375                                 log_println("setting error");
 376                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 377                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 378                         }
 379
 380                         vm_abort("emit_branch: emit long-branch on reg code");
 381                 }
 382                 else {
 383                         switch (condition) {
 384                         case BRANCH_EQ:
 385                                 M_BEQZ(reg, branchdisp);
 386                                 break;
 387                         case BRANCH_NE:
 388                                 M_BNEZ(reg, branchdisp);
 389                                 break;
 390                         case BRANCH_LT:
 391                                 M_BLTZ(reg, branchdisp);
 392                                 break;
 393                         case BRANCH_GE:
 394                                 M_BGEZ(reg, branchdisp);
 395                                 break;
 396                         case BRANCH_GT:
 397                                 M_BGTZ(reg, branchdisp);
 398                                 break;
 399                         case BRANCH_LE:
 400                                 M_BLEZ(reg, branchdisp);
 401                                 break;
 402                         default:
 403                                 vm_abort("emit_branch: unknown condition %d", condition);
 404                         }
 405
 406                         /* branch delay */
 407                         M_NOP;
 408                 }
 409         }
 410 }
 411
 412
 413 /* emit_bxx_xcc*****************************************************************
 414
 415    Wrappers for branches on 64-bit condition codes (SPARC specific).
 416
 417 *******************************************************************************/
 418
 419 void emit_beq_xcc(codegendata *cd, basicblock *target)
 420 {
 421         emit_bcc(cd, target, BRANCH_EQ, BRANCH_OPT_XCC);
 422 }
 423
 424 void emit_bne_xcc(codegendata *cd, basicblock *target)
 425 {
 426         emit_bcc(cd, target, BRANCH_NE, BRANCH_OPT_XCC);
 427 }
 428
 429 void emit_blt_xcc(codegendata *cd, basicblock *target)
 430 {
 431         emit_bcc(cd, target, BRANCH_LT, BRANCH_OPT_XCC);
 432 }
 433
 434 void emit_bge_xcc(codegendata *cd, basicblock *target)
 435 {
 436         emit_bcc(cd, target, BRANCH_GE, BRANCH_OPT_XCC);
 437 }
 438
 439 void emit_bgt_xcc(codegendata *cd, basicblock *target)
 440 {
 441         emit_bcc(cd, target, BRANCH_GT, BRANCH_OPT_XCC);
 442 }
 443
 444 void emit_ble_xcc(codegendata *cd, basicblock *target)
 445 {
 446         emit_bcc(cd, target, BRANCH_LE, BRANCH_OPT_XCC);
 447 }
 448
 449
 450
 451
 452
 453 /* emit_arithmetic_check *******************************************************
 454
 455    Emit an ArithmeticException check.
 456
 457 *******************************************************************************/
 458
 459 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 460 {
 461         if (INSTRUCTION_MUST_CHECK(iptr)) {
 462                 M_BNEZ(reg, 3);
 463                 M_NOP;
 464                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
 465         }
 466 }
 467
 468
 469 /* emit_arrayindexoutofbounds_check ********************************************
 470
 471    Emit an ArrayIndexOutOfBoundsException check.
 472
 473 *******************************************************************************/
 474
 475 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 476 {
 477         if (INSTRUCTION_MUST_CHECK(iptr)) {
 478                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
 479                 M_CMP(s2, REG_ITMP3);
 480                 M_XBULT(3);
 481                 M_NOP;
 482                 M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
 483         }
 484 }
 485
 486
 487 /* emit_arraystore_check *******************************************************
 488
 489    Emit an ArrayStoreException check.
 490
 491 *******************************************************************************/
 492
 493 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 494 {
 495         if (INSTRUCTION_MUST_CHECK(iptr)) {
 496                 M_BNEZ(REG_RESULT_CALLER, 3);
 497                 M_NOP;
 498                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_ArrayStoreException);
 499         }
 500 }
 501
 502
 503 /* emit_classcast_check ********************************************************
 504
 505    Emit a ClassCastException check.
 506
 507 *******************************************************************************/
 508
 509 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 510 {
 511 /* XXX: use 64-bit or 32-bit compares??? */
 512
 513         if (INSTRUCTION_MUST_CHECK(iptr)) {
 514                 switch (condition) {
 515                 case ICMD_IFEQ:
 516                         M_BNEZ(reg, 3);
 517                         break;
 518
 519                 case ICMD_IFLE:
 520                         M_BGTZ(reg, 3);
 521                         break;
 522
 523                 case BRANCH_ULT:
 524                         M_XBUGE(3);
 525                         break;
 526
 527                 default:
 528                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 529                 }
 530
 531                 M_NOP;
 532                 M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
 533         }
 534 }
 535
 536
 537 /* emit_nullpointer_check ******************************************************
 538
 539    Emit a NullPointerException check.
 540
 541 *******************************************************************************/
 542
 543 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 544 {
 545         if (INSTRUCTION_MUST_CHECK(iptr)) {
 546                 M_BNEZ(reg, 3);
 547                 M_NOP;
 548                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 549         }
 550 }
 551
 552
 553 /* emit_exception_check ********************************************************
 554
 555    Emit an Exception check.
 556
 557 *******************************************************************************/
 558
 559 void emit_exception_check(codegendata *cd, instruction *iptr)
 560 {
 561         if (INSTRUCTION_MUST_CHECK(iptr)) {
 562                 M_BNEZ(REG_RESULT_CALLER, 3);
 563                 M_NOP;
 564                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_CHECK_EXCEPTION);
 565         }
 566 }
 567
 568
 569 /* emit_trap *******************************************************************
 570
 571    Emit a trap instruction and return the original machine code.
 572
 573 *******************************************************************************/
 574
 575 uint32_t emit_trap(codegendata *cd)
 576 {
 577         uint32_t mcode;
 578
 579         /* Get machine code which is patched back in later. The
 580            trap is 1 instruction word long. */
 581
 582         mcode = *((uint32_t *) cd->mcodeptr);
 583
 584         M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_PATCHER);
 585
 586         return mcode;
 587 }
 588
 589
 590 /* emit_patcher_stubs **********************************************************
 591
 592    Generates the code for the patcher stubs.
 593
 594 *******************************************************************************/
 595
 596 void emit_patcher_stubs(jitdata *jd)
 597 {
 598         codegendata *cd;
 599         patchref    *pref;
 600         u4           mcode[2];
 601         u1          *savedmcodeptr;
 602         u1          *tmpmcodeptr;
 603         s4           targetdisp;
 604         s4           disp;
 605
 606         /* get required compiler data */
 607
 608         cd = jd->cd;
 609
 610         /* generate code patching stub call code */
 611
 612         targetdisp = 0;
 613
 614         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
 615                 /* check code segment size */
 616
 617                 MCODECHECK(100);
 618
 619                 /* Get machine code which is patched back in later. The
 620                    call is 2 instruction words long. */
 621
 622                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
 623
 624                 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
 625                    SPARC causes a SIGSEGV */
 626
 627                 mcode[0] = ((u4 *) tmpmcodeptr)[0];
 628                 mcode[1] = ((u4 *) tmpmcodeptr)[1];
 629
 630                 /* Patch in the call to call the following code (done at
 631                    compile time). */
 632
 633                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
 634                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
 635
 636                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) );
 637
 638                 if ((disp < (s4) 0xfffc0000) || (disp > (s4) 0x003ffff)) {
 639                         vm_abort("Jump offset is out of range: %d > +/-%d",
 640                                          disp, 0x003ffff);
 641                         return;
 642                 }
 643
 644                 M_BR(disp);
 645                 M_NOP;
 646
 647                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
 648
 649                 /* extend stack frame for wrapper data */
 650
 651                 M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
 652
 653                 /* calculate return address and move it onto the stack */
 654
 655                 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
 656                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 5 * 8);
 657
 658                 /* move pointer to java_objectheader onto stack */
 659
 660 #if defined(ENABLE_THREADS)
 661                 /* create a virtual java_objectheader */
 662
 663                 (void) dseg_add_unique_address(cd, NULL);                  /* flcword */
 664                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
 665                 disp = dseg_add_unique_address(cd, NULL);                  /* vftbl   */
 666
 667                 M_LDA(REG_ITMP3, REG_PV, disp);
 668                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 4 * 8);
 669 #else
 670                 /* do nothing */
 671 #endif
 672
 673                 /* move machine code onto stack */
 674
 675                 disp = dseg_add_s4(cd, mcode[0]);
 676                 M_ILD(REG_ITMP3, REG_PV, disp);
 677                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8);
 678
 679                 disp = dseg_add_s4(cd, mcode[1]);
 680                 M_ILD(REG_ITMP3, REG_PV, disp);
 681                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8 + 4);
 682
 683                 /* move class/method/field reference onto stack */
 684
 685                 disp = dseg_add_address(cd, pref->ref);
 686                 M_ALD(REG_ITMP3, REG_PV, disp);
 687                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 2 * 8);
 688
 689         /* move data segment displacement onto stack */
 690
 691                 disp = dseg_add_s4(cd, pref->disp);
 692                 M_ILD(REG_ITMP3, REG_PV, disp);
 693                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 1 * 8);
 694
 695                 /* move patcher function pointer onto stack */
 696
 697                 disp = dseg_add_functionptr(cd, pref->patcher);
 698                 M_ALD(REG_ITMP3, REG_PV, disp);
 699                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 0 * 8);
 700
 701                 if (targetdisp == 0) {
 702                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
 703
 704                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
 705                         M_ALD(REG_ITMP3, REG_PV, disp);
 706                         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);
 707                         M_NOP;
 708                 }
 709                 else {
 710                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
 711                                 (((u4 *) cd->mcodeptr));
 712
 713                         M_BR(disp);
 714                         M_NOP;
 715                 }
 716         }
 717 }
 718
 719
 720 /* emit_verbosecall_enter ******************************************************
 721
 722    Generates the code for the call trace.
 723
 724 *******************************************************************************/
 725
 726 #if !defined(NDEBUG)
 727 void emit_verbosecall_enter(jitdata *jd)
 728 {
 729         methodinfo   *m;
 730         codegendata  *cd;
 731         registerdata *rd;
 732         methoddesc   *md;
 733         s4            disp;
 734         s4            i, t;
 735         s4            stackslots;
 736
 737         /* get required compiler data */
 738
 739         m  = jd->m;
 740         cd = jd->cd;
 741         rd = jd->rd;
 742
 743         md = m->parseddesc;
 744
 745         /* mark trace code */
 746
 747         M_NOP;
 748
 749         /* XXX jit-c-call */
 750         stackslots = 1 + FLT_ARG_CNT;
 751         ALIGN_STACK_SLOTS(stackslots);
 752
 753         M_LDA(REG_SP, REG_SP, -(stackslots * 8));
 754
 755         /* save float argument registers */
 756
 757         for (i = 0; i < FLT_ARG_CNT; i++)
 758                 M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 759
 760         /* save temporary registers for leaf methods */
 761 /* XXX no leaf optimization yet
 762         if (code_is_leafmethod(code)) {
 763                 for (i = 0; i < INT_TMP_CNT; i++)
 764                         M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 765
 766                 for (i = 0; i < FLT_TMP_CNT; i++)
 767                         M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 768         }
 769 */
 770         /* load int/float arguments into integer argument registers */
 771
 772         for (i = 0; i < md->paramcount && i < INT_NATARG_CNT; i++) {
 773                 t = md->paramtypes[i].type;
 774
 775                 /* all available argument registers used, which adds a little complexity */
 776
 777                 if (IS_INT_LNG_TYPE(t)) {
 778                         if (i < INT_ARG_CNT) {
 779                                 M_INTMOVE(REG_WINDOW_TRANSPOSE(abi_registers_integer_argument[i]),
 780                                         abi_registers_integer_argument[i]);
 781                         }
 782                         else {
 783                                 assert(i == 5);
 784                                 M_LDX(REG_OUT5, REG_FP, JITSTACK);
 785                         }
 786                 }
 787                 else {
 788                         if (i < FLT_ARG_CNT) {
 789
 790                                 /* reg -> mem -> reg */
 791
 792                                 if (IS_2_WORD_TYPE(t)) {
 793                                         M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 794                                         M_LDX(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 795                                 }
 796                                 else {
 797                                         M_FST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 798                                         M_ILD(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 799                                 }
 800                         }
 801                         else {
 802
 803                                 /* mem -> reg */
 804
 805                                 assert(i == 5);
 806                                 if (IS_2_WORD_TYPE(t)) {
 807                                         M_LDX(REG_OUT5, REG_FP, JITSTACK);
 808                                 }
 809                                 else {
 810                                         M_ILD(REG_OUT5, REG_FP, JITSTACK);
 811                                 }
 812                         }
 813                 }
 814         }
 815
 816
 817         /* method info pointer is passed via stack */
 818         disp = dseg_add_address(cd, m);
 819         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 820         M_AST(REG_ITMP1, REG_SP, CSTACK);
 821         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 822         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 823         M_JMP(REG_RA_CALLER, REG_ITMP1, REG_ZERO);
 824         M_NOP;
 825
 826         /* restore float argument registers */
 827
 828         for (i = 0; i < FLT_ARG_CNT; i++)
 829                 M_DLD(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 830
 831         /* restore temporary registers for leaf methods */
 832 /* XXX no leaf optimization yet
 833         if (code_is_leafmethod(code)) {
 834                 for (i = 0; i < INT_TMP_CNT; i++)
 835                         M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 836
 837                 for (i = 0; i < FLT_TMP_CNT; i++)
 838                         M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 839         }
 840 */
 841         M_LDA(REG_SP, REG_SP, stackslots * 8);
 842
 843         /* mark trace code */
 844
 845         M_NOP;
 846 }
 847 #endif /* !defined(NDEBUG) */
 848
 849
 850 /* emit_verbosecall_exit *******************************************************
 851
 852    Generates the code for the call trace.
 853
 854 *******************************************************************************/
 855
 856 #if !defined(NDEBUG)
 857 void emit_verbosecall_exit(jitdata *jd)
 858 {
 859         methodinfo   *m;
 860         codegendata  *cd;
 861         registerdata *rd;
 862         s4            disp;
 863
 864         /* get required compiler data */
 865
 866         m  = jd->m;
 867         cd = jd->cd;
 868         rd = jd->rd;
 869
 870         /* mark trace code */
 871
 872         M_NOP;
 873
 874         /* XXX jit-c-call (keep stack aligned)*/
 875         M_LDA(REG_SP, REG_SP, -(2 * 8));
 876
 877         M_DST(REG_FRESULT, REG_SP, JITSTACK);
 878
 879         M_MOV(REG_RESULT_CALLEE, REG_OUT0);
 880         M_DMOV(REG_FRESULT, 1); /* logical dreg 1 => f2 */
 881         M_FMOV(REG_FRESULT, 2); /* logical freg 2 => f5 */
 882
 883         disp = dseg_add_functionptr(cd, m);
 884         M_ALD(REG_OUT3, REG_PV_CALLEE, disp);
 885
 886         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
 887         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
 888         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
 889         M_NOP;
 890
 891         M_DLD(REG_FRESULT, REG_SP, JITSTACK);
 892
 893         M_LDA(REG_SP, REG_SP, 2 * 8);
 894
 895         /* mark trace code */
 896
 897         M_NOP;
 898 }
 899 #endif /* !defined(NDEBUG) */
 900
 901
 902 /*
 903  * These are local overrides for various environment variables in Emacs.
 904  * Please do not remove this and leave it at the end of the file, where
 905  * Emacs will automagically detect them.
 906  * ---------------------------------------------------------------------
 907  * Local variables:
 908  * mode: c
 909  * indent-tabs-mode: t
 910  * c-basic-offset: 4
 911  * tab-width: 4
 912  * End:
 913  * vim:noexpandtab:sw=4:ts=4:
 914  */